Rev. 1.20
28
October 28, 2020
BC45B4523
• RxControl3 Register
This register is used to control the receiver behaviours.
Address
Bit
7
6
5
4
3
2
1
0
0x1F
Name
BPSKDecMeth BPSKDataRec SOFSel15693 — — — EMD_Suppress SOF43A_5Bits
Type
R/W
R/W
R/W
— — —
R/W
R/W
Reset Value
1
0
1
— — —
0
0
Bit 7
BPSKDecMeth
: Define the BPSK Decoding Method
0: Adaptive Framing
1: Digital Correlator
Refer to the “BPSK Bit Decoder” section for more details.
Bit 6
BPSKDataRec
: BPSK Data Recognition Function control
0: Disable
1: Enable
If this bit is set to 1, the BPSK Data Recognition block will be enabled. It improves BPSK data
reception especially in case of noisy or antenna detuning. This option can be applied in ISO14443A
higher rate and ISO14443B.
Bit 5
SOFSel15693
: Define the method of ISO15693 header recognition
0: Disable
1: Enable running window to search for SOF
If this bit is set to 1, system will use the running window method to search for a matched pattern of 4
valid bits of SOF. If there is a combination pattern like SOF but contain some invalid bits, system will
continue to search for next valid SOF and will be still in “Receiving” state. If it is cleared to 0, system
will quit the “Receiving” state with error reporting this occurrence. This bit increases noise immunity in
most cases. This option is recommended in both normal case and especially receiving write response in
which response time is quite long and there is significant probability to find noise pattern similar to the
SOF.
Bit 4~2 Unimplemented, read as “0”
Bit 1
EMD_Suppress
: EMD frame suppression control
0: Disable
1: Enable the EMD frame suppression
Setting this bit to 1 can enable the EMD frame suppression. This option is applicable for ISO14443A
and ISO14443B only. The condition for EMD suppression is that the number of data byte < 3 bytes and
there is at least an error in reception frame. This frame will be neglected and not send to FIFO. Refer to
the “EMD Suppression” section for more details.
Bit 0
SOF43A_5Bits
: Define the ISO14443A SOF condition
0: Only 1 valid SOF bit will be sufficient condition to treat the incoming frame valid
1: At least consecutive 5 valid bits will be sufficient condition to treat the incoming frame valid. The 5
valid bits are SOF and 4-bits data