Rev. 1.20
24
October 28, 2020
BC45B4523
• TypeBTxFraming Register
This register is used to difine framing for ISO14443B transmission.
Address
Bit
7
6
5
4
3
2
1
0
0x17
Name
NoTxSOF NoTxEOF EOFWidth
CharSpacing[2:0]
SOFWidth[1:0]
Type
R/W
R/W
R/W
R/W
R/W
Reset Value
0
0
1
1
1
0
1
1
Bit 7
NoTxSOF
:
If this bit is set to 1, the SOF will be omitted from the transmitted framing.
Bit 6
NoTxEOF
:
If this bit is set to 1, the EOF will be omitted from the transmitted framing.
Bit 5
EOFWidth
: Setup the length of EOF
0: 10 ETU
1: 11 ETU
Bit 4~2
CharSpacing[2:0]
:
This bit field is used to setup the length of EGT between 0 and 7 ETU when transmitted.
Bit 1~0
SOFWidth[1:0]
: Define SOF pattern in ISO14443B
00: 10 ETU low and 2 ETU high
01: 10 ETU low and 3 ETU high
10: 11 ETU low and 2 ETU high
11: 11 ETU low and 3 ETU high
Sector 0 – Page 3: RX and Decoder
• RxControl1 Register
This register is used to control the receiver behaviours.
Address
Bit
7
6
5
4
3
2
1
0
0x19
Name
SubCPulses[2:0]
SubCCarrier[1:0]
LP_Off
Gain[1:0]
Type
R/W
R/W
R/W
R/W
Reset Value
0
1
1
0
1
0
1
1
Bit 7~5
SubCPulses[2:0]
: Define the number of subcarrier pulses per bit
000: 1 Pulse – ISO14443A & 43B @ 848k
001: 2 Pulses – ISO14443A & 43B @ 424k
010: 4 Pulses – SO14443A & 43B @ 242k
011: 8 Pulses – ISO14443A & 43B @ 106k; ISO15693 @ 53k
100: 16 Pulses – ISO15693 @ 26k; ICODE1
101: 32 Pulses – ISO15693 @ 13k
110: 64 Pulses – ISO15693 @ 6.7k
111: Reserved
Bit 4~3
SubCCarrier[1:0]
: Define the number of carrier clocks used in subcarrier
00: 8 Clks
01: 16 Clks – ISO14443A & ISO14443B
10: 32 Clks – ISO15693
11: 64 Clks
Bit 2
LP_Off
: Lowpass filters off control
This bit is set to switch off all Lowpass filters to extend the incoming signal bandwidth.