10.1 Alternate Status Register
ERR
IDX
COR
DRQ
DSC
DF
RDY
BSY
0
1
2
3
4
5
6
7
Alternate Status Register
Figure 51. Alternate Status Register
This register contains the same information as the Status Register. The only difference between this
register and the Status Register is that reading the Alternate Status Register does not imply an interrupt
acknowledge or a clear of a pending interrupt. See 10.13, "Status Register" on page 72 for the definition of
the bits in this register.
10.2 Command Register
This register contains the command code being sent to the device. Command execution begins immedi-
ately after this register is written. The command set is shown in Figure 72 on page 107. All other registers
required for the command must be set up before writing to the Command Register.
10.3 Cylinder High Register
This register contains the high order bits of the starting cylinder address for any disk access. At the end of
the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 16–23. At the end of the command, this register is updated to re-
flect the current LBA Bits 16–23.
The cylinder number may be from zero to the number of cylinders minus one.
10.4 Cylinder Low Register
This register contains the low order 8 bits of the starting cylinder address for any disk access. At the end
of the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 8–15. At the end of the command, this register is updated to reflect
the current LBA Bits 8–15.
The cylinder number may be from zero to the number of cylinders minus one (1).
Hitachi Travelstar 60GH & 40GN hard disk drive specifications
68
Summary of Contents for IC25N010ATCS04
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