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Hitachi IC25N010ATCS04, Specifications

The Hitachi IC25N010ATCS04 is a high-performance hard drive, known for its reliability and storage capacity. With our website, you can easily access the user manual for this product, available for free download. Get all the necessary specifications and find step-by-step instructions on manualshive.com, ensuring a seamless user experience.

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Command category is referred to in section 12.0, "Command protocol" on page 101.

We recommend that the host system execute Soft reset and then retry to issue the command if the host
system time-out would occur for the device.

Note 1. 

 For SECURITY ERASE UNIT command, the execution time is referred to 13.22, "Security Erase

Unit (F4h)” on page 150.

Note 2. 

 For FORMAT UNIT command, the execution time is referred to 13.7, "Format Unit (F7h: Vendor

Specific)” on page 120.

Note 3.  

When the initial power mode at power on is Standby mode, and when the following commands

are issued by the host as First Command, the command's time-out value of the field is 10 seconds

:

Security Disable Password
Security Erase Unit
Security Set Password
Security Unlock.

Hitachi Travelstar 60GH & 40GN hard disk drive specifications

196

Summary of Contents for IC25N010ATCS04

Page 1: ... disk drive specifications Travelstar 60GH 40GN 2 5 inch ATA IDE IC25N010ATCS04 IC25N020ATCS04 IC25N030ATCS04 IC25N040ATCS04 IC25T060ATCS05 Models Revision 3 0 13 January 2003 S07N 7681 09 Publication 1540 ...

Page 2: ...k drive specifications Hitachi Travelstar 60GH 40GN 2 5 inch ATA IDE IC25N010ATCS04 IC25N020ATCS04 IC25N030ATCS04 IC25N040ATCS04 IC25T060ATCS05 Models Revision 3 0 13 January 2003 S07N 7681 09 Publication 1540 ...

Page 3: ... may not apply to you This publication could include technical inaccuracies or typographical errors Changes are periodically made to the information herein these changes will be incorporated in new editions of the publication Hitachi may make improvements or changes in any products or programs described in this publication at any time It is possible that this publication may contain reference to o...

Page 4: ...ation 20 5 6 Error recovery 20 5 5 Data buffer test 20 5 4 WRITE safety 19 5 3 Equipment status 19 5 2 Write Cache 19 5 1 Data loss on power off 19 5 0 Data integrity 17 4 4 3 Operating modes 15 4 4 2 Mechanical positioning 14 4 4 1 Command overhead 14 4 4 Performance characteristics 12 4 3 Cylinder allocation by model number 12 4 2 Data sheet 11 4 1 Formatted capacity by model number 11 4 0 Fixed...

Page 5: ...ng 41 7 0 Electrical interface specifications 40 6 11 Packaging 40 6 10 5 Secondary circuit protection 40 6 10 4 Flammability 40 6 10 3 German Safety Mark 40 6 10 2 IEC compliance 40 6 10 1 UL and CSA approval 40 6 10 Safety 39 6 9 2 C Tick Mark 39 6 9 1 CE Mark 39 6 9 Electromagnetic compatibility 39 6 8 Identification labels 38 6 7 2 Discrete tone penalty 37 6 7 1 Sound power level 37 6 7 Acoust...

Page 6: ...on timing 80 11 6 2 Power management commands 80 11 6 1 Power Mode 80 11 6 Power management features 79 11 5 2 LBA addressing mode 78 11 5 1 Logical CHS addressing mode 78 11 5 Sector Addressing Mode 78 11 4 3 Required power off sequence 77 11 4 2 Emergency unload 77 11 4 1 Load Unload 77 11 4 Power off considerations 76 11 3 Diagnostic and Reset considerations 75 11 2 Register initialization 73 1...

Page 7: ... 90h 116 13 3 Enable Disable Delayed Write FAh vendor specific 113 13 2 4 DEVICE CONFIGURATION SET subcommand C3h 113 13 2 3 DEVICE CONFIGURATION IDENTIFY subcommand C2h 113 13 2 2 DEVICE CONFIGURATION FREEZE LOCK subcommand C1h 112 13 2 1 DEVICE CONFIGURATION RESTORE subcommand C0h 112 13 2 Device Configuration Overlay B1h 111 13 1 Check Power Mode E5h 98h 107 13 0 Command descriptions 106 12 4 D...

Page 8: ...187 13 37 Write Long 32h 33h 185 13 36 Write DMA CAh CBh 184 13 35 Write Buffer E8h 183 13 34 Standby Immediate E0h 94h 182 13 33 Standby E2h 96h 181 13 32 6 Error reporting 180 13 32 5 Self test log data structure 177 13 32 4 S M A R T error log sector 175 13 32 3 Device Attribute Thresholds data structure 170 13 32 2 Device Attributes Data Structure 166 13 32 1 S M A R T Function Subcommands 165...

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Page 10: ...ting hole locations of all models except 60 GB model 31 Figure 26 Mounting hole locations of the 60 GB model 31 Figure 25 Physical dimensions and weight 27 Figure 24 Typical current wave form at start up of 20 GB model 27 Figure 23 Typical current wave form at start up of 40 GB model 26 Figure 22 Typical current wave form at start up of 60 GB model 26 Figure 21 Power consumption efficiency 25 Figu...

Page 11: ...able Delayed Write command FAh 115 Figure 79 DCO error information definition 114 Figure 78 Device Configuration Overlay Data structure 112 Figure 77 Device Configuration Overlay Features register values 112 Figure 76 Check Power Mode Command E5h 98h 111 Figure 75 Check Power Mode command E5h 98h 109 Figure 74 Command Set Subcommand 108 Figure 73 Command set 2 of 2 107 Figure 72 Command set 1 of 2...

Page 12: ...lag definitions 171 Figure 124 Individual Attribute Data Structure 170 Figure 123 Device Attribute Data Structure 167 Figure 122 Log sector addresses 165 Figure 121 S M A R T Function Set command B0h 164 Figure 120 Sleep command E6h 99h 163 Figure 119 Set Multiple command C6h 161 Figure 118 Set Max ADDRESS F9h 159 Figure 117 Set Features command EFh 158 Figure 116 Sense Condition Command F0h 157 F...

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Page 14: ... Abbreviations hard disk drive HDD hexadecimal h ground GND 32 ft sec 2 per Hertz G2 Hz 1 000 000 000 bits per square inch Gb sq in 1 000 000 000 bytes GB 1 000 000 000 bits Gb gravity a unit of force G field replacement unit FRU Federal Communications Commission FCC electrostatic discharge ESD Error Recovery Procedure ERP electromagnetic compatibility EMC European Economic Community EEC error cor...

Page 15: ...k p p part number P N population Pop power on hours POH PIO Open Drain Programmed Input Output OD Output O oscillations per minute oct min number No or microsecond us µs millisecond ms millimeter mm Machine Level Control MLC megahertz MHz 1 000 00 bits per square inch Mb sq in 1 000 000 bytes per second MB sec 1 000 000 Bit per second Mb sec 1 000 000 Bit per second Mbps 1 000 000 bytes MB maximum...

Page 16: ...ce of the printed circuit board The drive can be damaged by shock or ESD Electric Static Discharge Any damages incurred to the drive after removing it from the shipping package and the ESD protective bag are the responsi bility of the user 1 4 Drive handling precautions Do not press on the drive cover during handling Figure 1 Handling Precaution 1 Figure 2 Handling Precaution 2 Hitachi Travelstar ...

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Page 18: ...used for firmware Fast data transfer rate up to 100 MB s Media data transfer rate max 60 GB model 261 Mb s all other models 245 Mb s Average seek time 12 ms for read Closed loop actuator servo Embedded Sector Servo Rotary voice coil motor actuator Load Unload mechanism Mechanical latch Adaptive power save control 60 GB model 0 9 Watts at idle state all other models 0 65 Watts at idle state Power o...

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Page 20: ...Part 1 Functional specification Hitachi Travelstar 60GH 40GN hard disk drive specifications 7 ...

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Page 22: ...rvo No ID TM formatting Multizone recording Code 96 104 MTR ECC On The Fly Enhanced Adaptive Battery Life Extender 3 2 Head disk assembly data The following technologies are used in the drive Pico Slider Smooth glass disk GMR head Integrated lead suspension ILS Load unload mechanism Mechanical latch Hitachi Travelstar 60GH 40GN hard disk drive specifications 9 ...

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Page 24: ...high TPI format 512 512 512 Bytes per Sector Physical Layout IC25N030ATCS04 IC25N040ATCS04 IC25T060ATCS05 Description 10 056 130 560 20 003 880 960 Total Logical Data Bytes 19 640 880 39 070 080 Number of Sectors 16 383 16 383 Number of Cylinders 63 63 Number of Sectors Track 16 16 Number of Heads Logical Layout 1 1 Number of Disks 1 2 Number of Heads 360 672 336 648 360 672 336 648 Sectors per Tr...

Page 25: ...models 60 GB model Figure 4 Data sheet 4 3 Cylinder allocation by model number 307 33536 35071 15 336 30976 33535 14 352 29184 30975 13 364 27392 29183 12 384 24320 27391 11 403 22272 24319 10 416 20224 22271 9 432 17408 20223 8 448 15616 17407 7 460 13056 15615 6 480 9216 13055 5 499 6912 9215 4 512 4608 6911 3 528 2048 4607 2 544 1024 2047 1 556 0 1023 0 No of Sectors Trk Cylinder Zone 60 GB mod...

Page 26: ...t Figure 6 Cylinder allocation all models except 60 GB high TPI format 360 35328 38143 15 384 31744 35327 14 420 28160 31743 13 450 26880 28159 12 480 25344 26879 11 480 23296 25343 10 504 22016 23295 9 520 19968 22015 8 540 17152 19967 7 560 15360 17151 6 576 12288 15359 5 600 8704 12287 4 624 6656 8703 3 640 3328 6655 2 660 768 3327 1 672 0 767 0 No of Sectors Trk Cylinder Zone All other models ...

Page 27: ...nt upon the system and the application The following table gives a typical value for each parameter The detailed descriptions are found in section 5 0 100 100 Buffer host data transfer MB s 130 245 125 241 146 261 Disk buffer data transfer Mb s 1 0 1 0 Command overhead ms 3 0 5 0 Power on to ready sec 4200 5400 Rotational Speed RPM 14 14 Average Random Seek Time Write ms 12 12 Average Random Seek ...

Page 28: ...the start of motion of the actuator to the start of a reliable read or write operation A reliable read or write operation implies that error correction recovery is not employed to cor rect arrival problems The Average Seek Time is measured as the weighted average of all possible seek combinations max Σ max 1 n Tnin Tnout n 1 Weighted Average max 1 max Where max maximum seek length n seek length 1 ...

Page 29: ...5 5 11 1 5400 60 GB model Average Latency ms Time for one revolution ms Rotational Speed RPM Model Figure 12 Latency time 4 4 2 5 Drive ready time 9 5 3 0 All other models Power On To Ready 9 5 5 0 60 GB model Power On To Ready Max sec Typical sec Model Condition Figure 13 Drive ready time This includes the time required for the internal self diagnostics Power On To Ready The condition in which th...

Page 30: ...The execution of commands is delayed until the spindle becomes ready Sleep The device requires a soft reset or a hard reset to be activated All electronics including spindle motor and host interface are shut off Figure 14 Operating mode 4 4 3 1 Mode transition time 9 5 1 8 Idle Standby 20 GB 10 GB models 9 5 2 0 Idle Standby 40 GB 30 GB models 9 5 4 5 Idle Standby 60 GB model Transition Time max T...

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Page 32: ...ss confirm the completion of the actual write operation prior to the power off by issuing a Soft reset Hard reset Flush Cache command Standby command Standby Immediate command Sleep command Confirm the command s completion 5 3 Equipment status The equipment status is available to the host system any time the drive is not ready to read write or seek This status normally exists at the power on time ...

Page 33: ...ny auto reallocation to the host system The conditions for auto reallocation are described below 5 7 1 Nonrecovered write errors When a write operation cannot be completed after the Error Recovery Procedure ERP is fully carried out the sectors are reallocated to the spare location An error is reported to the host system only when the write cache is disabled and the auto reallocation has failed 5 7...

Page 34: ...the byte is bad On The Fly correctable Byte 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 1 1 1 1 1 1 1 1 Interleave A B C A B C A B C A B C A B C A B C A B C Error pattern 5 Error byte for each interleave X X X X X X X X X X X X X X X O O O Error pattern 5 5 5 5 5 X X X X X X X X X O O O X X X X X X Uncorrectable Byte 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 1 1 1 1 1 1 1 1 Interleave A B C A B C A B C A B C A ...

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Page 36: ... gradient Altitude Operating conditions Figure 17 Environmental condition The system is responsible for providing sufficient air movement to maintain surface temperatures below 60 C at the center of top cover and below 63 C at the center of the drive circuit board assembly The maximum storage period in the shipping package is one year Specification Environment 0 10 20 30 40 50 60 70 80 90 100 45 3...

Page 37: ... 100 5 0 60 Limits Gauss RMS Frequency KHz Figure 19 Magnetic flux density limits 6 1 3 Conductive noise The disk drive shall work without soft error degradation in the frequency range from DC to 20 Mhz injected through any two of the mounting screw holes of the drive when an AC current of up to 45 mA p p is applied through a 50 ohm resistor connected to any two mounting screw holes 6 1 4 Magnetic...

Page 38: ... 0 65 0 9 Low Power Idle average 0 85 0 95 1 3 Active Idle average 1 85 1 85 2 0 Performance Idle average 3 20GB 10 GB 40GB 30 GB 60 GB Models Watts RMS Typical Footnotes 1 The maximum fixed disk ripple is measured at the 5 volt input of the drive 2 The disk drive shall not incur damage for an over voltage condition of 25 maximum duration of 20 ms on the 5 volt nominal supply 3 The idle current is...

Page 39: ...30 40 60 Capacity GB Figure 21 Power consumption efficiency Note Power consumption efficiency is calculated as Power Consumption of Low Power Idle Watt Capacity GB 6 3 Start up Current Figure 22 Typical current wave form at start up of 60 GB model Hitachi Travelstar 60GH 40GN hard disk drive specifications 26 ...

Page 40: ...Figure 23 Typical current wave form at start up of 40 GB model Figure 24 Typical current wave form at start up of 20 GB model Hitachi Travelstar 60GH 40GN hard disk drive specifications 27 ...

Page 41: ...ion The drive is designed to be used under the following conditions The drive should be operated within specifications of shock vibration temperature humidity altitude and magnetic field The drive should be protected from ESD The breathing hole in the top cover of the drive should not be covered Force should not be applied to the cover of the drive The specified power requirements of the drive sho...

Page 42: ...il The actuator velocity is greater than the normal case and the unload process is inherently less controllable without a normal seek current profile Emergency unload is intended to be invoked in rare situations Because this operation is inherently uncon trolled it is more mechanically stressful than a normal unload The drive supports a minimum of 20 000 emergency unloads 6 4 6 2 Required Power Of...

Page 43: ...y power off on page 19 and section 5 2 Write Cache on page 19 6 4 6 4 Test considerations Start stop testing is classically performed to verify head disk durability The heads do not land on the disk so this type of test should be viewed as a test of the load unload function Start Stop testing should be done by commands through the interface not by power cycling the drive Simple power cycling of th...

Page 44: ... 2 0 25 69 85 0 25 9 5 0 2 40 GB 30 GB 155 Max 100 2 0 25 69 85 0 25 12 5 0 2 60 GB Weight gram Length mm Width mm Height mm Models Figure 25 Physical dimensions and weight 6 5 2 Mounting hole locations The mounting hole locations and size of the drive are shown below Figure 26 Mounting hole locations of the 60 GB model Hitachi Travelstar 60GH 40GN hard disk drive specifications 31 ...

Page 45: ...perate in all axes six directions and will stay within the specified error rates when tilted 5 degrees from these positions Performance and error rate will stay within specification limits if the drive is operated in the other permis sible orientations from which it was formatted Thus a drive formatted in a horizontal orientation will be able to run vertically and vice versa The recommended mounti...

Page 46: ... seek operation or spindle rotation 6 5 5 Load unload mechanism The head load unload mechanism is provided to protect the disk data during shipping movement or storage Upon power down a head unload mechanism secures the heads at the unload position See section 6 6 4 Nonoperating shock on page 36 for additional details Hitachi Travelstar 60GH 40GN hard disk drive specifications 33 ...

Page 47: ...of random vibration using the power spectral density PSD levels speci fied in C S 1 9711 002 1990 03 as V5L The vibration test level for V5L is 0 67 G RMS Root Mean Square 5 0 x E 4 500 5 0 x E 4 200 1 0 x E 3 150 1 0 x E 3 65 8 0 x E 3 62 8 0 x E 3 48 1 1 x E 3 45 1 1 x E 3 17 2 0 x E 5 5 G2 Hz Hz Random vibration PSD profile Breakpoint Figure 28 Random vibration PSD profile breakpoints operating...

Page 48: ...ak 10 to 500 to 10 Hz sine wave 0 5 oct min sweep rate 25 4 mm peak to peak displacement 5 to 10 to 5 Hz 6 6 3 Operating shock The hard disk drive meets the criteria in the table below while operating under these conditions The shock test consists of 10 shock inputs in each axis and direction for a total of 60 There must be a minimum of 3 seconds delay between shock pulses The disk drive will oper...

Page 49: ...20 G 700 G 60 GB Duration of 11 ms Duration of 1 ms Models Figure 32 Nonoperating shock The shocks are applied for each direction of the drive for three mutually perpendicular axes one axis at a time Input levels are measured on a base plate where the drive is attached with four screws Hitachi Travelstar 60GH 40GN hard disk drive specifications 36 ...

Page 50: ...tests are to be conducted with the drive supported by spacers so that the lower surface of the drive be located 25 3 mm above from the chamber floor No sound absorbing material shall be used The acoustical characteristics of the disk drive are measured under the following conditions Mode definitions Idle mode Power on disks spinning track following unit ready to receive and respond to control line...

Page 51: ...ollowing formula only when determining compliance Lwt spec Lw 0 1Pt 0 3 4 0 Bels where Lw A weighted sound power level Pt Value of desecrate tone penalty dLt 6 0 dBA dLt Tone to noise ratio taken in accordance with ISO 7779 at each octave band Hitachi Travelstar 60GH 40GN hard disk drive specifications 38 ...

Page 52: ...When installed in a suitable enclosure and exercised with a random accessing routine at maximum data rate the drive meets the following worldwide electromagnetic compatibility EMC requirements United States Federal Communications Commission FCC Rules and Regulations Class B Part 15 RFI Suppression German National Requirements EU EMC Directive Technical Requirements and Conformity Assessment Proced...

Page 53: ...ds used in this product are made of material with a UL recognized flammability rating of V 1 or better The flammability rating is marked or etched on the board All other parts not con sidered electrical components are made of material with a UL recognized flammability rating of V 1 or better except minor mechanical parts 6 10 5 Secondary circuit protection This product utilizes printed circuit wir...

Page 54: ...pecified in Annex A Connectors and Cable Assembly of the ATA ATAPI 5 document The figure below and Figure 6 5 2 on page 31 show the connector location and physical pin location 43 44 22 Pin Pin 19 1 2 A C B D Pin position 20 is left blank for correct connector insertion Pin positions A B C and D are used for the drive address setting Refer to Figure 48 on page 58 for correct address setting Figure...

Page 55: ...04 3 state I O DD07 03 GND 02 TTL I RESET 01 Type I O SIGNAL PIN Type I O SIGNAL PIN designates reserved pins which must be left unconnected reserved designates a power supply to the drive power designates an Open Drain output OD designates an input output common I O designates an input to the drive I designates an output from the drive O Figure 35 Signal definition The signal lines marked with ar...

Page 56: ...Read Operation DIOW STOP DIOR HSTROBE IORDY DDMARDY Write Operation Conventional Definition Special Definition for Ultra DMA Figure 36 Special signal definitions for Ultra DMA Hitachi Travelstar 60GH 40GN hard disk drive specifications 43 ...

Page 57: ...d only when the drive is selected and the host activates the IEN bit in the Device Control Register Otherwise this signal is in high impedance state regardless of the state of the IRQ bit The interrupt is set when the IRQ bit is set by the drive CPU The IRQ is reset to zero by a host read of the status register or a write to the Command Register This signal is a 3 state line with 24 mA of sink cap...

Page 58: ...l the drive works as a Slave The signal level of CSEL to one drive should be different from the signal level to another drive on the same AT interface cable to avoid master master or slave slave configurations KEY Pin position 20 has no connection pin It is recommended to close the respective position of the cable connector in order to avoid incorrect insertion IORDY This signal is an indication t...

Page 59: ...y the host prior to initiation of an Ultra DMA burst A STOP shall be negated by the host before data is transferred in an Ultra DMA burst Assertion of STOP by the host during or after data transfer in an Ultra DMA mode signals the termination of the burst DDMARDY Ultra DMA This signal is used only for Ultra DMA data transfers between host and drive The signal DDMARDY is a flow control signal for U...

Page 60: ... 4 V min 0 5 V max Output High Voltage Output Low Voltage Outputs 2 0 V min 5 5 V max 0 5 V min 0 8 V max Input High Voltage Input Low Voltage Inputs 7 6 Reset timings t10 t1 RESET BUSY 25 RESET low width t10 9 5 RESET high to Not BUSY t1 Max µ µ µ µs Min µ µ µ µs PARAMETER DESCRIPTION Figure 37 System reset timings Hitachi Travelstar 60GH 40GN hard disk drive specifications 47 ...

Page 61: ...to IORDY active tRD 10 DIOR DIOW to address valid hold t9 30 Address valid to IOCS16 released t8 40 Address valid to IOCS16 assertion t7 30 DIOR data tristate t6z 5 DIOR data hold t6 20 DIOR data setup t5 10 DIOW data hold t4 20 DIOW data setup t3 25 DIOR DIOW recovery time t2i 70 DIOR DIOW pulse width t2 25 Address valid to DIOR DIOW setup t1 120 Cycle time t0 MAX ns MIN ns PARAMETER DESCRIPTION ...

Page 62: ...elay DIOW to DMARQ delay tLR tLW 25 DIOR negated pulse width DIOW negated pulse width tKR tKW 5 DIOR DIOW to DMACK hold tJ 0 DMACK to DIOR DIOW setup tI 10 DIOW data hold tH 20 DIOR DIOW data setup tG 5 DIOR data hold tF 50 DIOR data access tE 70 DIOR DIOW asserted pulse width tD 120 Cycle time t0 MAX ns MIN ns PARAMETER DESCRIPTION Figure 39 Multiword DMA cycle timings Hitachi Travelstar 60GH 40G...

Page 63: ...0 10 10 10 Maximum time allowed for output drivers to release tAZ 38 57 86 115 154 230 Two cycle time t2CYC 16 8 25 39 54 73 112 Cycle time tCYC 90 120 0 130 0 170 0 200 0 230 0 First DSTROBE time tFS 0 0 0 0 0 0 Minimum time before driving IORDY tZIORDY 50 20 55 20 55 20 70 20 70 20 70 20 Envelope time tENV 20 20 20 20 20 20 Setup time for DMACK tACK 0 0 0 0 0 0 Unlimited interlock time tUI MAX n...

Page 64: ...AX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE 1 MODE 0 PARAMETER DESCRIPTION Note When a host does not satisfy the tSR timing the host should be ready to receive two more data words after HDMARDY is negated Figure 41 Ultra DMA cycle timings Host Pausing Read Hitachi Travelstar 60GH 40GN hard disk drive specifications 51 ...

Page 65: ...20 20 20 20 20 20 Interlock time with minimum tMLI 20 20 20 20 20 20 Minimum delay time required for output tZAH 10 10 10 10 10 10 Maximum time allowed for output drivers to release tAZ 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 85 100 100 100 125 160 Ready to pause time tRP 50 60 60 60 70 75 HDMARDY to final DSTROBE time tRFS MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN...

Page 66: ...vice tDS 20 20 20 20 20 20 Interlock time with minimum tMLI 20 20 20 20 20 20 Maximum delay time required for output tZAH 10 10 10 10 10 10 Maximum time allowed for output drivers to release tAZ 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 50 50 50 50 50 50 Time from DSTROBE edge to negation of DMARQ tSS MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns ...

Page 67: ...9 54 73 112 Cycle time tCYC 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 0 0 0 0 0 0 Minimum time before driving IORDY tZIORDY 55 20 55 20 55 20 70 20 70 20 70 20 Envelope time tENV 20 20 20 20 20 20 Setup time for DMACK tACK 0 0 0 0 0 0 Unlimited interlock time tUI MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE...

Page 68: ...MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE 1 MODE 0 PARAMETER DESCRIPTION Note When a device does not satisfy the tSR timing the device is ready to receive two more data words after DDMARDY is negated Figure 45 Ultra DMA cycle timings Device Pausing Write Hitachi Travelstar 60GH 40GN hard disk drive specifications 55 ...

Page 69: ...ce tDH 4 5 7 7 10 15 CRC word setup time at device tDS 20 20 20 20 20 20 Interlocking time with minimum tMLI 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 85 100 100 100 125 160 Ready to pause time tRP 50 60 60 60 70 75 DDMARDY to final HSTROBE time tRFS MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE 1 MODE 0 PAR...

Page 70: ...hold time at device tDH 4 5 7 7 10 15 CRC word setup time at device tDS 20 20 20 20 20 20 Interlock time with minimum tMLI 75 0 100 0 100 0 150 0 150 0 150 0 Limited interlock time tLI 50 50 50 50 50 50 Time from HSTROBE edge to assertion of STOP tSS MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MAX ns MIN ns MODE 5 MODE 4 MODE 3 MODE 2 MODE 1 MODE 0 PARAMETER DESCRIPTION F...

Page 71: ...er attach a jumper here Setting 5 Never attach a jumper here When pin C is grounded the drive does not spin up at POR When the drive address is Cable Select the address depends on the condition of pin 28 of the AT inter face cable If pin 28 is ground or low the drive is a Master If pin 28 is open or logic high the drive is a Slave 7 10 1 Drive default address setting The default setting of jumper ...

Page 72: ...ol Block registers The following table shows the I O address map Drive address Reg 1 1 1 0 1 Device control Reg Alt Status Reg 0 1 1 0 1 Control Block Registers Command Reg Status Reg 1 1 1 1 0 Drive Head Reg Drive Head Reg 0 1 1 1 0 Cylinder high Reg Cylinder high Reg 1 0 1 1 0 Cylinder low Reg Cylinder low Reg 0 0 1 1 0 Sector number Reg Sector number Reg 1 1 0 1 0 Sector count Reg Sector count ...

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Page 74: ...Part 2 Interface specification Hitachi Travelstar 60GH 40GN hard disk drive specifications 61 ...

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Page 76: ...functions included by ATA ATAPI 5 standards or newer standards Device Configuration Overlay The drive supports the following functions as Vendor Specific Functions Address Offset Feature Format Unit Function ENABLE DISABLE DELAYED WRITE SENSE CONDITION command 8 2 Terminology Interrupt request Device or Host INTRQ The first command which is executed after the power on reset also known as a hard re...

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Page 78: ...ess the prefailure attributes exceed their corresponding thres holds For example a Power On Hours Attribute never results in a negative reliability status S M A R T Return Status WRITE VERIFY command does not include read verification after write operation The function is the same as WRITE SECTORS command Write Verify Standby timer is enabled by STANDBY command or IDLE command The value in the Sec...

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Page 80: ...ta bus high impedance x 0 1 A N Not used Data bus high impedance x x 0 A N Control block registers Not used Data bus high impedance x x x N N WRITE DIOW READ DIOR DA0 DA1 DA2 CS1 CS0 Functions Addresses x either A or N N signal not asserted A signal asserted Logic conventions Mapping of registers in LBA mode Figure 50 Register Set Communication to or from the device is through an I O Register that...

Page 81: ...efore writing to the Command Register 10 3 Cylinder High Register This register contains the high order bits of the starting cylinder address for any disk access At the end of the command this register is updated to reflect the current cylinder number In LBA Mode this register contains Bits 16 23 At the end of the command this register is updated to re flect the current LBA Bits 16 23 The cylinder...

Page 82: ...n DRQ 1 is in the Status Register 10 6 Device Control Register 0 IEN SRST 1 0 1 2 3 4 5 6 7 Drive Control Register Figure 52 Device Control Register Bit Definitions Interrupt Enable When IEN 0 and the device is selected the device interrupts to the host will be enabled When IEN 1 or the device is not selected the device interrupts to the host will be disabled IEN Software Reset The device is held ...

Page 83: ...his bit is not a device and will always be in a high impedance state HIZ 10 8 Device Head Register HS0 HS1 HS2 HS3 DRV 1 L 1 0 1 2 3 4 5 6 7 Device Head Register Figure 54 Device Head Register This register contains the device and head numbers Bit Definitions Head Select These four bits indicate the binary encoded address of the head Bit HS0 is the least significant bit At command completion these...

Page 84: ... ABT ID Not Found When IDN 1 it indicates that the requested sector s ID field could not be found IDNF IDN Uncorrectable Data Error When UNC 1 it indicates that an uncorrectable data error has been encountered UNC Interface CRC Error When CRC 1 it indicates that a CRC error has occurred on the data bus during a Ultra DMA transfer ICRCE CRC 10 10 Features Register This register is command specific ...

Page 85: ...e Status Register continuously Therefore the host should not attempt to use IDX bit for timing purposes IDX Corrected Data Always 0 CORR COR Data Request Bit DRQ 1 indicates that the device is ready to transfer a word or byte of data between the host and the device The host should not write the Command register when DRQ 1 DRQ Device Seek Complete If DSC 1 it indicates that a Seek has completed and...

Page 86: ...et Software Reset The RESET signal is negated in the ATA Bus The device resets the interface circuitry and sets the default values Hard Reset Hardware Reset The device executes a series of electrical circuitry diagnostics spins up the head disk assembly tests speed and other mechanical parametric and sets default values Power On Reset POR The actions of each reset are shown in Figure 57 on page 74...

Page 87: ...operation o o Aborting Host interface soft reset hard reset POR o execute x does not execute Notes Set according to the initial power mode selection 6 After reset the Standby timer value is set to 109 minutes 5 In the case of sleep mode the device goes to standby mode In other cases the device does not change current mode 4 The Set Features command with Feature register CCh enables the device to r...

Page 88: ...igure 58 Default Register Values If an Execute Device Diagnostic command is carried out if the system is powered on or if a hard reset oc curs the system generates an Error Register diagnostic code See the table below for a description of the codes Device 1 failed 8xh Controller microprocessor error 05h ECC circuitry error 04h Sector buffer error 03h Formatter device error 02h No error detected 01...

Page 89: ... DASP is asserted by Device 0 and Device 1 if it is present in order to indicate device active Soft Reset DASP is read by Device 0 to determine if Device 1 is present If Device 1 is pre sent Device 0 shall read PDIAG to determine when it is valid to clear the BSY bit and whether Device 1 has powered on or reset without error otherwise Device 0 clears the BSY bit whenever it is ready to accept comm...

Page 90: ...en the drive power is interrupted with the heads still loaded the microcode cannot operate and the normal 5V power is unavailable to unload the heads In this case normal unload is not possible so the heads are unloaded by routing the back EMF of the spinning motor to the voice coil The actuator velocity is greater than the normal case and the unload process is inherently less controllable without ...

Page 91: ...edia The drive supports both Logical CHS Addressing Mode and LBA Addressing Mode as the sector addres sing mode The host system may select either the currently selected CHS translation addressing or LBA addressing on a command by command basis by using the L bit in the DEVICE HEAD register A host system must set the L bit to 1 if the host uses LBA Addressing mode 11 5 1 Logical CHS addressing mode...

Page 92: ...e LBA address of a given logical sector does not change The following formula is always true LBA cylinder x heads_per_cylinder heads x sectors_per_track sector 1 where heads_per_cylinder and sectors_per_track are the current translation mode values On LBA addressing mode the LBA value is set to the following register LBA bits 7 0 Sector Number LBA bits 15 8 Cylinder Low LBA bits 23 16 Cylinder Hig...

Page 93: ...s a reset to be activated Sleep Mode 11 6 2 Power management commands The Check Power Mode command allows a host to determine if a device is currently in going to or leav ing standby mode The Idle and Idle Immediate commands move a device to idle mode immediately from the active or stand by modes The idle command also sets the standby timer count and starts the standby timer The sleep command move...

Page 94: ...r Power Modes Each power mode affects the physical interface as defined in the following table Inactive No x x Sleep Inactive Yes 1 o Standby Active Yes 1 o Idle Active Yes x x Active Media Interface active RDY BSY Mode Figure 62 Power conditions Ready RDY is not a power condition A device may post ready at the interface even though the media may not be accessible The interface is inactive in slee...

Page 95: ...ndby state The IDENTIFY DEVICE response word 83 bit 3 indicates that Advanced Power Management feature is supported if set Word 86 bit 3 indicates that Advanced Power Management is enabled if set Word 91 bits 7 0 contain the current Advanced Power Management level if Advanced Power Management is enabled 11 7 1 Performance Idle Mode This mode is usually entered immediately after Active mode command...

Page 96: ...Enable Advanced Power Management command The optimal time to enter Active Idle mode is variable depending on the recent behavior of the user It is not possible to achieve the same level of Power savings with a fixed entry time into Active Idle because every user s data and access pattern is different The optimum entry time changes over time The same algorithm works for entering into Low Power Idle...

Page 97: ...eing used and the identity of these attributes is vendor specific and proprietary 11 8 2 Attribute values Attribute values are used to represent the relative reliability of individual performance or calibration attri butes Higher attribute values indicate that the analysis algorithms being used by the device are predicting a lower probability of a degrading or fault condition existing Accordingly ...

Page 98: ...ndby Immediate or Sleep command or Hard Reset but also by the automatic power saving functions like ABLE 3 or Standby timer So basically it is not necessary for a host system to enable the attribute auto save feature when it utilizes the power management If the attribute auto save feature is enabled attribute values will be saved after 30minutes passed since the last saving besides above condition...

Page 99: ...urity level The following security levels are provided When the device lock function is enabled and the User Password is forgotten then only the Master Password with a Security Erase Unit command can unlock the device Then user data is erased Maximum level security When the device lock function is enabled and the User Password is forgotten the device can be unlocked via a Master Password High leve...

Page 100: ...5 1 Master Password setting The system manufacturer or dealer can set an initial Master Password using the Security Set Password command without enabling the Device Lock Function 11 9 5 2 User Password setting When a User Password is set the device will automatically enter lock mode the next time the device is powered on Setting password POR Set Password with User Password Normal operation Power o...

Page 101: ...mplete Complete Erase Unit Lock function Disable Normal operation All commands are available Freeze Lock command Enter Device Frozen mode Normal Operation expect Set Password Disable Password Erase Unit Unlock commands Enter Device Unlock mode N Y N Y Erase Prepare Media Access Non media Access Match 1 refers to the commands in Figure 66 Command table for device lock operation on 90 and 91 Figure ...

Page 102: ...th Master Password Normal operation Figure 65 Password lost 11 9 5 5 Attempt limit for the SECURITY UNLOCK command The SECURITY UNLOCK command has an attempt limit the purpose of which is to prevent someone from attempting to unlock the drive with various passwords numerous times The device counts the password mismatch If the password does not match the device counts it without distinguishing the ...

Page 103: ...Read Sector s o o o Read Native Max ADDRESS o o x Read Multiple o o x Read Long o o x Read DMA o o o Read Buffer o o o Initialize Device Parameters o o o Idle Immediate o o o Idle o o o Identify Device o o x Format Unit o o x Format Track o o o Flush Cache o o o Execute Device Diagnostic o o x Device Configuration SET o o o Device Configuration IDENTIFY o o o Device Configuration FREEZE LOCK o o x...

Page 104: ...lds o o o S M A R T Read Attribute Values o o o S M A R T Execute Off line Immediate o o o S M A R T Enable Operations o o o S M A R T Enable Disable Attribute Autosave o o o S M A R T Enable Disable automatic off line o o o S M A R T Disable Operations o o o Sleep o o o Set Multiple Mode o o o Set Max UNLOCK o o o Set Max SET PASSWORD Device Frozen Mode Device Unlocked Mode Device Locked Mode Com...

Page 105: ...ange for protected area 1 032 192 0FC000h Customer usable sector count 528 482 304 bytes 528MB Customer usable device size 16 384 004000h Required blocks for protected area 8 388 608 bytes Required size for protected area 1 048 575 0FFFFFh Max LBA native 536 870 912 bytes 536MB Capacity native 1 Shipping drives from the drive manufacturer When the drive is shipped from the manufacturer the device ...

Page 106: ...e used during the current power on cycle This password is not related to the password used for the Security Mode Feature set When the password is set the device is in the Set Max Unlocked mode This command requests a transfer of a single sector of data from the host The following figure defines the content of this sector of information The password is retained by the device until the next power cy...

Page 107: ...de The password the Set Max security mode and the unlock counter do not persist over a power cycle but persist over a hardware or software reset NOTE If this command is immediately preceded by a Read Native MAX ADDRESS command it shall be interpreted as a Set Max ADDRESS command regardless of Feature register value Set Max Inactive Set Max SET PASSWORD Set Max UNLOCK Set Max Unlocked SetMax LOCK S...

Page 108: ...r on Defaults has been enabled by Set Features command it is cleared by Soft reset as well Upon entering offset mode the capacity of the drive returned in the Identify Device data is the size of the former protected area A subsequent Set Max Address command with the address returned by the Read Max Address command allows access to the entire drive Addresses wrap so the entire drive remains address...

Page 109: ...Address Offset mode 11 11 3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error even if the access protection is removed by a Set Max Address command Read Look Ahead operation is not carried out even if it is enabled by the Set Feature command Hitachi Travelstar 60GH 40GN hard disk drive specifications 96 ...

Page 110: ...r the actual seek operation for the next seek command starts right after completion of the actual seek operation for the first seek command The execution of two seek commands overlaps excluding the actual seek operation With this overlap total elapsed time for a number of seek commands is the total accumulated time for the actual seek operation plus one pre and post overhead When the number of see...

Page 111: ...s issued the operation to write the data from the cache buffer into the media is begun Power consumption can be reduced by Delayed Write When Write commands come with a long interval the device must exit from the power saving mode and enter into the power saving mode again without Delayed Write function If Delayed Write is enabled such power saving mode transition times can be re duced As a result...

Page 112: ...red write errors When a write operation can not be completed after the Error Recovery Procedure ERP is fully carried out the sector s are reallocated to the spare location An error is reported to the host system only when the write cache is disabled and the auto reallocation fails If the number of available spare sectors reaches 16 sectors the write cache function will be disabled automatically No...

Page 113: ...This page intentionally left blank ...

Page 114: ...e host reads the Status Register issues a reset or writes to the Command Register See Section 14 0 Time out values on page 195 for the device time out values 12 1 Data In commands These commands are Identify Device Read Buffer Read Long Read Multiple Read Sectors S M A R T Read Attribute Values S M A R T Read Attribute Thresholds S M A R T Read log sector Execution includes the transfer of one or ...

Page 115: ... the device detects an invalid parameter then it will abort the command by setting BSY 0 ERR 1 ABT 1 and interrupting the host If an error occurs the device will set BSY 0 ERR 1 and DRQ 1 The device will then store the error status in the Error Register and interrupt the host The registers will contain the location of the sector in error The error location will be reported using CHS mode or LBA mo...

Page 116: ...s received the sector or block d When the device has finished processing the sector or block it sets BSY 0 and interrupts the host e In response to the interrupt the host reads the Status Register f The device clears the interrupt in response to the Status Register being read 5 For the Write Long command a The device sets BSY 0 and DRQ 1 when it is ready to receive a sector b The host writes one s...

Page 117: ...ation of the sector in error The error location will be reported with CHS mode or LBA mode The mode is decided by the mode select bit bit 6 of the Device Head register on issuing the command All data transfers to the host through the Data Register are 16 bits The ECC bytes are an exception having only 8 bits Hitachi Travelstar 60GH 40GN hard disk drive specifications 104 ...

Page 118: ... M A R T Enable Disable Automatic Off line S M A R T Enable Operations S M A R T Execute Off line Immediate S M A R T Return Status S M A R T Save Attribute Values Standby Standby Immediate Execution of these commands involves no data transfer 1 The host writes any required parameters to the Features Sector Count Sector Number Cylinder and Device Head Registers 2 The host writes the command code t...

Page 119: ...e DMA protocol allows high performance multitasking operating systems to eliminate processor over head associated with PIO transfers 1 The host initializes the Slave DMA channel 2 The host writes any required parameters to the Features Sector Count Sector Number Cylinder and Device Head registers 3 The host writes command code to the Command Register 4 The device sets DMARQ when it is ready to tra...

Page 120: ...1 1 0 0 0 F8 Read Native Max ADDRESS 3 1 1 0 0 0 1 0 0 C4 Read Multiple 1 0 0 1 0 0 0 1 1 23 Read Long 1 0 0 1 0 0 0 1 0 22 Read Long 1 1 1 0 0 1 0 0 1 C9 Read DMA 4 1 1 0 0 1 0 0 0 C8 Read DMA 4 1 1 1 0 0 1 0 0 E4 Read Buffer 1 1 0 0 1 0 0 0 1 91 Initialize Device Parameters 3 1 0 0 1 0 1 0 1 95 Idle Immediate 3 1 1 1 0 0 0 0 1 E1 Idle Immediate 3 1 0 0 1 0 1 1 1 97 Idle 3 1 1 1 0 0 0 1 1 E3 Idle...

Page 121: ... 1 0 0 0 0 B0 S M A R T Read Attribute Thresholds 1 1 0 1 1 0 0 0 0 B0 S M A R T Read Attribute Values 1 1 0 1 1 0 0 0 0 B0 S M A R T Execute Off line Immediate 3 1 0 1 1 0 0 0 0 B0 S M A R T Enable Operations 3 1 0 1 1 0 0 0 0 B0 S M A R T Enable Disable Automatic Off line 3 1 0 1 1 0 0 0 0 B0 S M A R T Enable Disable Attribute Auto save 3 1 0 1 1 0 0 0 0 B0 S M A R T Disable Operations 3 1 0 0 1...

Page 122: ...Write Long 09 EF Enable Address Offset mode 05 EF Enable Advanced Power Management feature 03 EF Set Transfer mode 02 EF Enable Write Cache Set Features DB B0 S M A R T Enable Disable Automatic Off line DA B0 S M A R T Return Status D9 B0 S M A R T Disable Operations D8 B0 S M A R T Enable Operations D6 B0 S M A R T Write Log Sector D5 B0 S M A R T Read Log Sector D4 B0 S M A R T Execute Off line ...

Page 123: ... specified This bit is used by Set Max ADDRESS command V Valid This indicates that the bit is part of an output parameter and should be specified x This indicates that the hex character is not used This indicates that the bit is not used Input Registers 0 This indicates that the bit is always set to 0 1 This indicates that the bit is always set to 1 H Head number This indicates that the head numbe...

Page 124: ...X COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 75 Check Power Mode command E5h 98h The Check Power Mode command will report whether the device is spun up and the media is available for immediate access Input parameters from the device Sector Count This indicates the power mode code The command returns FFh in the Sector Cou...

Page 125: ...vice Configuration Overlay feature set commands are identified by the value placed in the Features register The table below shows these Features register values Reserved other DEVICE CONFIGURATION SET C3h DEVICE CONFIGURATION IDENTIFY C2h DEVICE CONFIGURATION FREEZE LOCK C1h DEVICE CONFIGURATION RESTORE C0h Command Value Figure 77 Device Configuration Overlay Features register values 13 2 1 DEVICE...

Page 126: ...reduce the set of optional commands modes or feature sets supported by a device as indicated by a DEVICE CONFIGURATION IDENTIFY command The DEVICE CONFIGURATION SET command transfers an overlay that modifies some of the bits set in words 63 82 83 84 and 88 of the IDENTIFY DEVICE command response When the bits in these words are cleared the device no longer support the indicated command mode or fea...

Page 127: ... 1 Ultra DMA mode 2 and below are supported 2 1 Ultra DMA mode 3 and below are supported 3 1 Ultra DMA mode 4 and below are supported 4 1 Ultra DMA mode 5 and below are supported 5 Reserved 15 6 Ultra DMA modes supported 2 1 Multiword DMA mode 0 is supported 0 1 Multiword DMA mode 1 and below are supported 1 1 Multiword DMA mode 2 and below are supported 2 Reserved 15 3 Multiword DMA modes support...

Page 128: ...t to disable any feature enabled 04h Device s feature is already modified with DCO 03h Device is now Security Locked mode 02h DCO feature is frozen 01h error reason code description Sector count invalid bit location Cylinder low invalid word location Cylinder high Figure 79 DCO error information definition Hitachi Travelstar 60GH 40GN hard disk drive specifications 115 ...

Page 129: ...ter Error Register Figure 80 Enable Disable Delayed Write command FAh The Enable Disable Delayed Write command sets if the Delayed Write function is enabled or disabled Delayed Write function is enabled or disabled according to the feature register s value Even if the Delayed Write function is enabled by this command Delayed Write does not work when the Write Cache function is disabled For details...

Page 130: ...V V V V V V 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 81 Execute Device Diagnostic command 90h The Execute Device Diagnostic command performs the internal diagnostic tests implemented by the device The results of the test are stored in the Error Register The normal Error Register bit definitions do not apply t...

Page 131: ...Command Block Output Registers V 0 V 0 V 0 0 0 V 0 0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 82 Flush Cache command E7h This command causes the device to complete writing data from its cache The device returns a status of RDY 1 and DSC 1 50h after following sequence Data in the write cache buffer is writ...

Page 132: ... not verify the correct initialization of the data sector Any data previously stored on the track will be lost Output parameters to the device Sector Number In LBA mode this register specifies that LBA address bits 0 7 are to be formatted L 1 Cylinder High Low This indicates the cylinder number of the track to be formatted L 0 In LBA mode this register specifies that LBA address bits 8 15 Low and ...

Page 133: ...tion are available right after the completion of this command They are also used on the next power on reset or hard reset This command erases both previous information data from the device Note that the Format Unit command initializes from LBA 0 to Native MAX LBA Host MAX LBA is set by Initialize Drive Parameter or Set MAX ADDRESS command is ignored The protected area by Set MAX ADDRESS command is...

Page 134: ...s command is shown below 12 min IC25N010ATCS04 22 min IC25N020ATCS04 34 min IC25N030ATCS04 44 min IC25N040ATCS04 60 min IC25T060ATCS05 Execution time Model number Hitachi Travelstar 60GH 40GN hard disk drive specifications 121 ...

Page 135: ... Input Registers Command Block Output Registers V 0 0 V 0 0 0 V 0 0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 85 Identify Device command ECh The Identify Device command requests the device to transfer configuration information to the host The device will transfer a sector to the host containing the informa...

Page 136: ...is not required to spin up and IDENTIFY DEVICE response is complete C837H 02 Number of cylinders in default translate mode Note 1 01 Reserved 0 0 1 hard sectored 1 1 1 identify data incomplete 2 0 1 not MFM encoded 3 1 1 head switch time 15 µs 4 1 1 spindle motor control option implemented 5 0 1 fixed drive 6 1 1 removable cartridge drive 7 0 1 disk transfer rate 5 Mbps 8 0 1 disk transfer rate 5 ...

Page 137: ...cylinders XXXXH 54 Validity flag of the word 15 3 0 Reserved 2 1 1 Word 88 is Valid 1 1 1 Word 64 70 are Valid 0 1 1 Word 54 58 are Valid 0007H 53 DMA data transfer cycle timing mode Refer Word 62 and 63 0200H 52 PIO data transfer cycle timing mode 0200H 51 Capabilities 15 0 0 the contents of word 50 are valid 14 1 1 the contents of word 50 are valid 13 1 0 Reserved 0 0 1 the device has a minimum ...

Page 138: ...000H 69 79 Minimum PIO Transfer Cycle Time With IORDY Flow Control 15 0 78h Cycle time in nanoseconds 120 ns 16 6 MB s 0078H 68 Minimum PIO Transfer Cycle Time Without Flow Control 15 0 F0h Cycle time in nanoseconds 240 ns 8 3 MB s 00F0H 67 Manufacturer s Recommended Multiword DMA Transfer Cycle Time 15 0 78h Cycle time in nanoseconds 120 ns 16 6 MB s 0078H 66 Minimum Multiword DMA Transfer Cycle ...

Page 139: ...ror logging supported 4003H 84 Command set supported 15 0 Always 14 1 Always 13 12 0 Reserved 11 1 1 Device Configuration Overlay command supported 10 9 0 Reserved 8 1 1 SET MAX security extension supported 7 1 1 Address Offset feature supported 6 0 1 SET FEATURES subcommand required to spin up 5 1 1 Power Up In Standby feature set supported 4 0 1 Removable Media Status Notification Feature Set su...

Page 140: ...mand set feature enabled 15 0 Always 14 1 Always 13 2 0 Reserved 1 1 1 SMART self test supported 0 1 1 SMART error logging supported 4003H 87 Command set feature enabled 15 12 0 Reserved 11 1 1 Device Configuration Overlay supported 10 9 0 Reserved 8 X 1 SET MAX security extension enabled 7 X 1 Address Offset mode enabled 6 0 1 SET FEATURES subcommand required to spin up 5 0 1 Power Up In Standby ...

Page 141: ...Reserved 01 a jumper was used 10 the CSEL signal was used 11 some other method used or method unknown 8 1 Always 7 0 Device 0 hardware reset result Device 1 clears these bits to 0 7 0 Reserved 6 X 1 Semi duplex mode is enabled 5 X 1 Device 0 detected Device 1 4 X 1 Device 1 passed diagnostic 3 X 1 Device 0 passed diagnostic 2 1 X how Device 0 determined the device number 00 Reserved 01 a jumper wa...

Page 142: ...wer Mode 1 Standby 0 Idle 000XH 131 Reserved XXXXH 130 Current Set Feature Option Bit assignments 15 4 0 Reserved 3 X 1 Auto reassign enabled 2 X 1 Reverting enabled 1 X 1 Read Look ahead enabled 0 X 1 Write Cache enabled 000XH 129 Description Content Word Figure 92 Identify device information Part 7 of 7 Hitachi Travelstar 60GH 40GN hard disk drive specifications 129 ...

Page 143: ...ads 3FFFh Number of cylinders IC25N030ATCS04 0 4A85300h Total number of user addressable sectors 0DD0h 1 768KB Buffer size 10h Number of heads 3FFFh Number of cylinders IC25N040ATCS04 0 6FC7C80h Total number of user addressable sectors 0DD0h 1 768KB Buffer size 10h Number of heads 3FFFh Number of cylinders IC25T060ATCS05 0 CAxOAxxx Microcode revision Figure 93 Number of cylinders heads sectors by ...

Page 144: ...arameter standby timer the point timer starts counting down When the power save mode is already any idle mode the device remains in that mode When the Idle mode is entered the device is spun up to operating speed If the device is already spinning the spin up sequence is not executed During Idle mode the device is spinning and is ready to respond to host commands immediately Input parameters to the...

Page 145: ...IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 95 Idle Immediate command E1h 95h The Idle Immediate command causes the device to enter Performance Idle mode The device is spun up to operating speed If the device is already spinning the spin up sequence is not executed During Idle mode the device is spinning and ready to ...

Page 146: ...ialize Device Parameters command enables the host to set the number of sectors per track and the number of heads minus 1 per cylinder Words 54 58 in Identify Device Information reflects these parameters The parameters remain in effect until the following events occur Another Initialize Device Parameters command is received The device is powered off A hard reset occurs A soft reset occurs and the S...

Page 147: ...RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 97 Read Buffer command E4h The Read Buffer command transfers a sector of data from the sector buffer of the device to the host The sector is transferred through the Data Register 16 bits at a time The sector transferred will be from the same part of the buffer written to by the last Write Buff...

Page 148: ...suing the command The data transfers are qualified by the DMARQ and are performed by the slave DMA channel The device issues only one interrupt per command to indicate that the data transfer has terminated and that status is available If an uncorrectable error occurs the read will be terminated at the failing sector Output parameters to the device Sector Count This indicates the number of continuo...

Page 149: ...L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the sector to be transferred L 0 In LBA mode this register contains the current LBA bits 24 27 L 1 Hitachi Travelstar 6...

Page 150: ...the device will keep setting DRQ 1 to indicate that the device is ready to transfer the ECC bytes to the host The data is transferred 16 bits at a time and the ECC bytes are transferred 8 bits at a time The number of ECC bytes are 4 or 40 according to the setting of Set Feature option The default setting is 4 bytes of ECC data The command makes a single attempt to read the data and does not check ...

Page 151: ...he transferred sector L 0 In LBA mode this register contains current LBA bits 8 15 Low 16 23 High L 1 H This indicates the head number of the transferred sector L 0 In LBA mode this register contains current LBA bits 24 27 L 1 The device internally uses 40 bytes of ECC data on all data written or read from the disk The 4 byte mode of operation is provided via an emulation Use of the 40 byte ECC mo...

Page 152: ...fers the data from the device to the host The sectors are transferred through the Data Register 16 bits at a time The command execution is identical to the Read Sectors command with one exception an interrupt is generated for each block as defined by the Set Multiple command instead of for each sector Output parameters to the device Sector Count This indicates the number of continuous sectors to b...

Page 153: ...r L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 24 27 L 1 Hitachi Travelstar ...

Page 154: ...he native max LBA CYL is returned Output parameters to the device L LBA mode This indicates the addressing mode L 0 specifies CHS mode and L 1 specifies the LBA addressing mode D This is the device number bit Indicates that the device number bit of the Device Head Register should be specified D 0 selects the master device and D 1 selects the slave device Indicates that the bit is not used Input pa...

Page 155: ... Valid Indicates that the bit is part of an input parameter and will be set to 0 or 1 by the device This indicates that the bit is not used Hitachi Travelstar 60GH 40GN hard disk drive specifications 142 ...

Page 156: ...ata from disk media and then transfers the data from the device to the host The sectors are transferred through the Data Register 16 bits at a time If an uncorrectable error occurs the read will be terminated at the failing sector Output parameters to the device Sector Count This indicates the number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred ...

Page 157: ... L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This is the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This is the head number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 24 27 L 1 Hitachi Travelstar 60GH 40GN hard ...

Page 158: ...The difference between the Read Sectors command and Read Verify Sectors command is that data is transferred to the host during a Read Sectors command and data is not transferred to the host during a Read Verify Sectors command If an uncorrectable error occurs the read verify will be terminated at the failing sector Output parameters to the device Sector Count This is the number of continuous secto...

Page 159: ...or L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This is the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This is the head number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 24 27 L 1 Hitachi Travelstar 60GH 40GN har...

Page 160: ...Block Input Registers Command Block Output Registers V 0 V 0 V 0 0 V V 0 0 0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 104 Recalibrate command 1xh The Recalibrate command moves the read write heads from anywhere on the disk to cylinder 0 If the device cannot reach cylinder 0 T0N Track 0 Not Found will be set...

Page 161: ... information specified in Figure 106 The device then checks the transferred password If the User Password or Master Password matches the given password the device disables the security mode feature device lock function This command does not change the Master Password which may be reactivated later by setting User Password This command should be executed in device unlock mode Reserved 17 255 Passwo...

Page 162: ...0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 107 Security Erase Prepare command F3h The Security Erase Prepare command must be issued immediately before the Security Erase Unit command to enable device erasing and unlocking The Security Erase Prepare Command must be issued immediately before the Format Unit C...

Page 163: ...nit command initializes all user data sectors and then disables the device lock function Note that the Security Erase Unit command initializes from LBA 0 to Native MAX LBA The Host MAX LBA is set by the Initialize Drive Parameter or the Set MAX ADDRESS command is ignored The protected area by the Set MAX ADDRESS command is also initialized This command requests the transfer of a single sector of d...

Page 164: ...ity erase prepare command should be completed immediately prior to the Security Erase Unit command If the device receives a Security Erase Unit command without a prior Security Erase Prepare command the device aborts the security erase unit command This command disables the security mode feature device lock function however the master password is still stored internally within the device and may b...

Page 165: ... T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 110 Security Freeze Lock command F5h The Security Freeze Lock Command allows the device to enter frozen mode immediately After this command is completed the command which updates Security Mode Feature Device Lock Function is rejected Frozen mode is quit only by a Power off The following commands are reje...

Page 166: ...nd F1h The Security Set Password command enables the security mode feature device lock function and sets the master password or the user password The security mode feature device lock function is enabled by this command and the device is not locked immediately The device is locked after the next power on reset or hard reset When the MASTER pass word is set by this command the master password is re...

Page 167: ...Code is not set The Revision Code field is returned in Identify Device word 92 The valid Revision Codes are 0000h to FFFDh The Default Master Password Revision Code is FFFEh The code FFFFh is reserved The setting of the Identifier and Security level bits interact as follows Identifier User Security level High The password supplied with the command will be saved as the new user password The securit...

Page 168: ... device will be in device lock mode The password has not been changed yet The Security Unlock command requests to transfer a single sector of data from the host including infor mation specified in Figure 114 on page 156 If the Identifier bit is set to master and the drive is in high security mode then the password supplied will be compared with the stored master password If the drive is in maximum...

Page 169: ... device regards Password as the Master Password The user can detect if the attempt to unlock the device has failed due to a mismatched password since this is the only reason that an abort error will be returned by the drive AFTER the password information has been sent to the device If an abort error is returned by the device BEFORE the password data has been sent to the drive then another problem ...

Page 170: ...esignated track and selects the designated head The device does not need to be formatted for a seek to execute properly Output parameters to the device Sector Number In LBA mode this register specifies the LBA address bits 0 7 for seek L 1 Cylinder High Low This is the cylinder number of the seek In LBA mode this register specifies the LBA address bits 8 15 Low and bits 16 23 High for seek L 1 H T...

Page 171: ... sense temperature in a device This command is executable without spinning up even if a device is started with No Spin Up option If this command is issued at the temperature out of range which is specified for operating condition the error might be returned with IDN bit 1 Not recommendable condition for start up If over stressed condition is detected this bit will be set to one N Temperature is hi...

Page 172: ...N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 117 Set Features command EFh The Set Feature command establishes the following parameters which affect the execution of certain features as shown in the table below ABT will be set to 1 in the Error Register if the Feature register contains any undefined values After the power on reset or hard reset the dev...

Page 173: ... PIO Flow Control Transfer Mode x 00001 nnn 00000 001 PIO Default Transfer Mode Disable IORDY 00000 000 PIO Default Transfer Mode When the Feature register is 05h Enable Advanced Power Management the Sector Count Register specifies the Advanced Power Management level Aborted 00h FFh The deepest Power Saving mode is Standby 01h 7Fh The deepest Power Saving mode is Low power Idle 80h BFh The deepest...

Page 174: ...YL which is set via this command as a default value This command implement SET MAX security extension commands as subcommands But regardless of Feature register value the case this command is immediately preceded by a Read Native Max ADDRESS command it is interpreted as a Set Max ADDRESS command The Read Native Max ADDRESS command should be issued and completed immediately prior to issuing the Set...

Page 175: ... Low and bits 16 23 High which are to be set L 1 H In LBA mode this register contains LBA bits 24 27 which are to be input L 1 In CHS mode this register is ignored L 0 L This indicates the LBA addressing mode L 0 specifies the CHS mode and L 1 specifies the LBA addressing mode D This indicates the device number bit The device number bit of the Device Head should be specified D 0 selects the master...

Page 176: ...e device to perform Read and Write Multiple commands and establishes the block size for these commands The block size is the number of sectors to be transferred for each interrupt The default block size after power up or hard reset is 0 The Read Multiple and Write Multiple commands are disabled If an invalid block size is specified an Abort error will be returned to the host The Read Multiple and ...

Page 177: ...5 6 7 Status Register Error Register Figure 120 Sleep command E6h 99h This command is the only way to cause the device to enter Sleep Mode When this command is issued the device confirms the completion of the cached write commands before it asserts INTRQ Then the device is spun down and the interface becomes inactive The only way to recover from Sleep Mode is with a software reset or a hardware re...

Page 178: ...used for logging and reporting purposes and to accommo date special user needs The S M A R T Function Set command has several separate subcommands which are selectable via the device s Features Register when the S M A R T Function Set command is issued by the host In order to select a subcommand the host must write the subcommand code to the device s Features Register before issuing the S M A R T ...

Page 179: ...tosave feature either enabled or disabled will be preserved by the device across the power cycle A value of 00h written by the host into the device s Sector Count Register before issuing the S M A R T Enable Disable Attribute Autosave subcommand will cause this feature to be disabled Disabling this feature does not preclude the device from saving Attribute Values to the Attribute Data sectors duri...

Page 180: ...rt its routine depending on the interrupting command Captive mode When executing self test in captive mode the device sets BSY to one and executes the specified self test routine after receipt of the command At the end of the routine the device sets the execution result in the Self test execution status byte Figure 123 on page 170 and ATA registers see definitions below and then executes the comma...

Page 181: ...e S M A R T Disable Operations command will be preserved in the device s Attribute Data Sectors If the device is re enabled these Attribute Values will be updated as needed upon receipt of a S M A R T Read Attribute Values or a S M A R T Save Attribute Values command 13 32 1 10 S M A R T Return Status subcommand DAh This subcommand is used to communicate the reliability status of the device to the...

Page 182: ... data collection activities which is initiated by the S M A R T Execute Off line Immediate Subcommand D4h or automatically if the off line read scanning feature is disabled A value of F8h written by the host into the device s Sector Count register before issuing this subcommand shall cause the automatic Off line data collection feature to be enabled A value of F9 written by the host into the devic...

Page 183: ...ity 0003h 1 170h 2 S M A R T capability 1Bh 1 16Fh 1 Off line data collection capability 2 1 16Eh 1 Current segment pointer 2 1 16Ch 2 Total time in seconds to complete off line data collection activity 2 1 16Bh 1 Self test execution status 2 1 16Ah 1 Off line data collection status 2 1 15Eh 12 30th Device Attribute 2 1 02h 12 1st Device Attribute 0010h binary 00h 2 Data Structure Revision Number ...

Page 184: ...bit flags 01h 2 Status Flags binary 00h 1 Attribute ID Number 01h to FFh Value Offset Byte Description Figure 124 Individual Attribute Data Structure Attribute ID Numbers Any nonzero value in the Attribute ID Number indicates an active attribute The device supports following Attribute ID Numbers The names marked with indicate that the correspond ing Attribute Values can be either collected on line...

Page 185: ...e with the Threshold values A Threshold is the excursion limit for a normalized Attribute Value In normalizing the raw data the device will perform any necessary statistical validity checks to ensure that an instantaneous raw value is not improperly reflected in the normalized Attribute Value i e one read error in the first 10 reads being interpreted as exceeding the read error rate threshold when...

Page 186: ...5 The self test routine was completed with an electrical element failure 6 The self test routine was completed with a servo element failure 7 The self test routine was completed with a read element failure 15 The self test routine is in progress 13 32 2 5 Total time in seconds to complete off line data collection activity This field tells the host how many seconds the device requires to complete t...

Page 187: ... M A R T ENABLE DISABLE ATTRIBUTE AUTOSAVE command Bit Definition 0 Pre power mode attribute saving capability If bit 1 the device will save its Attribute Values prior to going into a power saving mode Standby or Sleep mode 1 Attribute auto save capability If bit 1 the device supports the S M A R T ENABLE DISABLE ATTRIBUTE AUTOSAVE command 2 15 Reserved 0 13 32 2 9 Error logging capability Bit Def...

Page 188: ...tive Attribute Thresholds will appear in the same order as their corresponding Attribute Values 512 2 1FFh 1 Data structure checksum 3 17Ch 131 Vendor specific 3 16Ah 18 Reserved 2 1 15Eh 12 30th Device Attribute 2 1 02h 12 1st Device Attribute 0010h binary 00h 2 Data Structure Revision Number Value Format Offset Byte Description 1 See the following definitions 2 Value varies by actual operating c...

Page 189: ...test purposes binary 01h 1 Attribute Threshold for comparison with Attribute Values from 00h to FFh binary 00h 1 Attribute ID Number 01h to FFh Format Offset Byte Description Figure 127 Individual Threshold Data Structure 13 32 3 3 Attribute ID Numbers Attribute ID Numbers supported by the device are the same as Attribute Values Data Structures 13 32 3 4 Attribute Threshold These values are preset...

Page 190: ...Description Figure 128 S M A R T error log sector 13 32 4 1 S M A R T error log version This value is set to 01h 13 32 4 2 Error log pointer This points to the most recent error log data structure Only values 1 through 5 are valid 13 32 4 3 Device error count This field contains the total number of errors The value will not roll over 13 32 4 4 Error log data structure The data format of each error...

Page 191: ... Command register 06h 1 Device Head register 05h 1 Cylinder High register 04h 1 Cylinder Low register 03h 1 Sector number register 02h 1 Sector count register 01h 1 Features register 00h 1 Device Control register Offset Byte Description Figure 130 Command data structure Hitachi Travelstar 60GH 40GN hard disk drive specifications 178 ...

Page 192: ...ector number register 02h 1 Sector count register 01h 1 Error register 00h 1 Reserved Offset Byte Description Figure 131 Error data structure State field contains a value indicating the device state when command was issued to the device Vendor specific xBh xFh Reserved x5h xAh S M A R T Off line or Self test x4h Active Idle x3h Standby x2h Sleep x1h Unknown x0h State Value Note The value of the x ...

Page 193: ...ecution status n 18h 02h 1 Self test number 00h 2 Data structure revision Offset Byte Description Note N is 0 through 20 Figure 132 Self test log data structure The data structure contains the descriptor of the Self test that the device has performed Each descriptor is 24 bytes long and the self test data structure is capable to contain up to 21 descriptors After 21 descriptors has been recorded t...

Page 194: ...command other than S M A R T ENABLE OPERATIONS was received by the device while the device was in a S M A R T Disabled state 04h 51h A S M A R T FUNCTION SET command was re ceived by the device with a subcommand value in the Features Register that is either invalid or not supported by this device 04h 51h A S M A R T FUNCTION SET command was re ceived by the device without the required key being lo...

Page 195: ...t asserts the INTRQ Following the INTRQ the interface remains active and the device is spun down If the device is already spun down the spin down sequence is not executed During the Standby mode the device will respond to commands however there will be a delay while waiting for the spindle to reach operating speed The timer starts counting down when the device returns to Idle mode Output parameter...

Page 196: ...ister Figure 135 Standby Immediate command E0h 94h The Standby Immediate command causes the device to enter the Standby mode immediately When this command is issued the device confirms the completion of the cached write commands before it asserts the INTRQ Following the INTRQ the interface remains active and the device is spun down If the device is already spun down the spin down sequence is not e...

Page 197: ...0 0 0 ERR IDX COR DRQ DSC DF RDY BSY AMN T0N ABT 0 IDN 0 UNC CRC 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 Status Register Error Register Figure 136 Write Buffer command E8h The Write Buffer command transfers a sector of data from the host to the sector buffer of the device The sectors of data are transferred through the Data Register 16 bits at a time The Read Buffer and Write Buffer commands are synchroni...

Page 198: ...the Data Register16 bits at a time The host initializes a slave DMA channel prior to issuing the command Data transfers are qualified by DMARQ and are performed by the slave DMA channel The device issues only one interrupt per com mand to indicate that data transfer has terminated and status is available If an uncorrectable error occurs the write will be terminated at the failing sector Output par...

Page 199: ...er of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the last transferred sector L 0 In LBA mode this register contains the current LBA bi...

Page 200: ...the device then the data and the ECC bytes are written to the disk media After 512 bytes of data have been transferred the device will keep setting DRQ 1 to indicate that the device is ready to receive the ECC bytes from the host The data is transferred 16 bits at a time and the ECC bytes are transferred 8 bits at a time The number of ECC bytes are either 4 or 40 according to setting of the Set Fe...

Page 201: ...sector to be transferred L 0 In LBA mode this register contains current the LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the sector to be transferred L 0 In LBA mode this register contains current the LBA bits 24 27 L 1 The drive internally uses 40 bytes of ECC on all data read or writes The 4 byte mode of operation is provided via an emulation technique As a conse...

Page 202: ...then written to the disk media Command execution is identical to the Write Sectors command except that an interrupt is generated for each block as defined by the Set Multiple command instead of for each sector The sectors are transferred through the Data Register 16 bits at a time Output parameters to the device Sector Count This indicates the number of continuous sectors to be transferred If the ...

Page 203: ...ector L 0 In LBA mode this register contains current the LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the last transferred sector L 0 In LBA mode this register contains current the LBA bits 24 27 L 1 Hitachi Travels...

Page 204: ... then written to the disk media The sectors are transferred through the Data Register 16 bits at a time If an uncorrectable error occurs the write will be terminated at the failing sector when the auto reassign function is disable Output parameters to the device Sector Count This indicates the number of continuous sectors to be transferred If the Sector Count of zero is specified 256 sectors will ...

Page 205: ...ector L 0 In LBA mode this register contains the current LBA bits 0 7 L 1 Cylinder High Low This indicates the cylinder number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 8 15 Low and bits 16 23 High L 1 H This indicates the head number of the last transferred sector L 0 In LBA mode this register contains the current LBA bits 24 27 L 1 Hitachi Travels...

Page 206: ...rive the Write Verify command is exactly the same as the Write Sectors command 30h Read verification is not performed after the write operation Refer to 13 39 Write Sectors Command on page 191 for parameters Hitachi Travelstar 60GH 40GN hard disk drive specifications 193 ...

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Page 208: ...t Command 10 µs Status Register BSY 1 256th Read From Data Register Device Busy After Data Transfer In 30 sec Status Register BSY 0 and DRQ 1 Interrupt Status Register BSY 1 Interrupt DRQ For Data Transfer In 400 ns Status Register BSY 1 OUT To Command Register Device Busy After Command Code Out Data In Command 31 sec Status Register BSY 0 and RDY 1 Bus RESET Signal Asserted Device Ready After Har...

Page 209: ... 13 22 Security Erase Unit F4h on page 150 Note 2 For FORMAT UNIT command the execution time is referred to 13 7 Format Unit F7h Vendor Specific on page 120 Note 3 When the initial power mode at power on is Standby mode and when the following commands are issued by the host as First Command the command s time out value of the field is 10 seconds Security Disable Password Security Erase Unit Securi...

Page 210: ...es INITIALIZE DEVICE PARAMETERS 91h Mandatory Yes EXECUTE DEVICE DIAGNOSTIC 90h Optional No CFA TRANSLATE SECTORS 87h Mandatory Yes SEEK 7xh Obsoleted Yes FORMAT TRACK 50h Obsoleted Yes READ VERIFY SECTOR S 41h Mandatory Yes READ VERIFY SECTOR S 40h Obsoleted Vendor specific WRITE VERIFY 2 3Ch Optional Note 7 No CFA TRANSLATE SECTORS W O ERASE 38h Obsoleted Yes WRITE LONG 33h Obsoleted Yes WRITE L...

Page 211: ... Mandatory Yes CHECK POWER MODE E5h Optional Yes READ BUFFER E4h Mandatory Yes IDLE E3h Mandatory Yes STANDBY E2h Mandatory Yes IDLE IMMEDIATE E1h Mandatory Yes STANDBY IMMEDIATE E0h Optional Note 7 No MEDIA UNLOCK DFh Optional Note 7 No MEDIA LOCK DEh Optional Note 7 No GET MEDIA STATUS DAh Optional Note 7 No CFA WRITE MULTIPLE W O ERASE CDh Optional No WRITE DMA QUEUED CCh Obsoleted Yes WRITE DM...

Page 212: ...er on defaults CCh Yes Set 4 bytes ECC BBh Yes Enable read look ahead feature AAh No Enable Media Status Notification 95h Yes Disable Address Offset mode 89h Yes Disable Advanced Power Management 85h Yes Disable write cache 82h Yes Disable reverting to power on defaults 66h No Enable SERVICE interrupt 5Eh No Enable release interrupt 5Dh Yes Disable read look ahead feature 55h Yes Set vendor specif...

Page 213: ...avelstar 48GH 30GN 15GN The Hitachi Travelstar 60GH 40GN has changed one feature present in the Hitachi Travelstar 48GH 30GN 15GN The identify device information data Hitachi Travelstar 60GH 40GN hard disk drive specifications 200 ...

Page 214: ...ity Freeze Lock F5h 152 Security Set Password F1h 153 Security Unlock F2h 155 Seek 7xh 157 Set Features EFh 159 Set Max ADDRESS F9h 161 Set Multiple C6h 163 Sleep E6h 99h 164 Standby E2h 96h 182 Standby Immediate E0h 94h 183 Write Buffer E8h 184 Write DMA CAh CBh 185 Write Long 32h 33h 187 Write Multiple C5h 189 Write Sectors 30h 31h 191 Write Verify 3Ch 193 Command descriptions 107 Command protoc...

Page 215: ...ister Set 67 Reset Diagnostic and reset considerations 76 Register initialization 75 Reset error register values 76 Reset timings 47 S S M A R T S M A R T operation with power management modes 85 S M A R T Capability 174 S M A R T function 84 Attribute thresholds 84 Attribute values 84 Attributes 84 S M A R T commands 84 Threshold exceeded condition 84 S M A R T Function Set 165 S M A R T Function...

Page 216: ...ommand completion timing 80 T Table of signals 42 Time out interval 131 Time out Parameter 131 132 Time out values 195 U User Password 86 V Vibration 34 W Write Buffer 103 184 Write Cache 19 98 Write DMA 106 185 Write Long 103 187 Write Multiple 103 189 Write Sectors 103 191 Write Verify 103 193 ...

Page 217: ...istered trademarks of their respective companies References in this publication to Hitachi Global Storage Technologies products programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Storage Technologies operates Product information is provided for information purposes only and does not constitute a warran...

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