47
9.2
TDA884X Video Processor
Fig 7
Block Diagram
AG
C
FO
R
IF
+ TUNE
R
SYN
C
SEP.
+ 1s
t LOOP
VC
O
+ CONT
ROL
VID
E
O
AM
PL
IFIER
V
E
RT
. S
Y
NC.
SEPAR
A
TO
R
VID
E
O
M
U
TE
FILTER
T
U
NI
NG
2nd LOOP
HOR.
OUT
H
/V D
IVID
E
R
CONT
IN
UOUS
CA
T
H
ODE
CA
LI
B
R
A
T
IO
N
PR
E-
AM
P.
+ M
U
TE
LUM
A
DE
LA
Y
PEAKIN
G
CORI
NG
P
LL DE
M
O
D.
CONT
ROL
DA
C’
s
CHROM
A
TR
AP
+
BAN
D
P
ASS
C
VBS-
Y
/C
SW
ITC
H
C
V
BS SW
ITC
H
PAL
/N
TSC
SEC
AM
DE
CODE
R
BASE-
BAN
D
D
E
LAY TIM
E
VER
T
IC
AL
GE
OM
E
T
RY
RGB
CONT
ROL
B
LUE
S
T
RE
T
C
H
OUTP
UT
BL
AC
K
S
T
RE
T
C
H
RGB
M
A
T
R
IX
RGB
1
IN
P
U
T
C
D
M
A
TR
IX
S
A
T
. CONT
ROL
S
K
IN T
INT
VIF AM
PL
IFIER
+ P
LL DE
M
O
D
+
C
A
LI
BR
ATIO
N
AFC
VID
E
O
ID
EN
T
AVL
+
S
W
IT
CH +
VO
LU
M
E
LI
M
ITE
R
S
O
UND
BAN
D
P
ASS
S
O
UND
TR
AP
48
49
IF-
IN
53
8
7
54
5
15 55
45
56
10
11
35
33
16
34
36
38
1
13
6
SD
AA
SC
L
H-DRI
V
E
TU
N
E
R
TOP
PO
L
AFC
SW
RE
F
HUE
SW
CVBS OUT
C
V
B
S
I
N
MU
T
E
ID
EN
T
A
U
D
IO
O
U
T
2
A
UDI
O I
N
VO
L
SW
I²
C
BU
S
TR
AN
SC
EIVE
R
C
h
r
C
V
B
S/
Y
40
41
42
39
37
12
9
44
14
43
BR
I
WH
IT
E
P
CONT
R
50 E
H
T
46
47
V.
DRI
VE
52
51
21 R
20 G
19 B
22
BEAM
CUR
R
18
BL
ACK
CUR
R
23 R
1
24 G1
25 G1
26 B
L1
SAT
RE
F
F
SC
