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MM516

User's Manual

33

Revision 1.4 7-8-2011

Hardware Description Manual

Figure 18

16-bit Slot Length and Sample Format

5.4.7 Additional Features

BlueCore 5 chip has a mute facility that forces PCM_OUT to be 0. In master mode, PCM_SYNC may also be
forced to 0 while keeping PCM_CLK running which some codecs use to control power down.

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Summary of Contents for MM516

Page 1: ...1 4 7 8 2011 Hardware Description Manual JULY 2011 MM516 Bluetooth QD ID B018234 End Product Listing FCC ID ZDSMM516 IC 9583A MM516 Class 2 BC05 ext Multimedia Module Wireless Modules User s Manual Ha...

Page 2: ...ine DSP 12 3 5 4 System RAM 12 3 5 5 External Memory Driver 12 3 5 6 USB 12 3 5 7 Synchronous Serial Interface 13 3 5 8 UART 13 3 6 Microcontroller 13 3 6 1 Programmable I O 13 3 6 2 802 11 Coexistenc...

Page 3: ...1 5 8 1 Pin States on Reset 42 5 8 2 Status after Reset 43 5 9 Power Supply 43 5 9 1 Switch mode Regulator 43 5 9 2 Low voltage Linear Regulator 43 5 9 3 Low voltage Audio Linear Regulator 43 6 Electr...

Page 4: ...31 Figure 18 16 bit Slot Length and Sample Format 32 Figure 19 PCM Master Timing Long Frame Sync 34 Figure 20 PM Master Timing Short Frame Sync 34 Figure 21 PCM Slave Timing Long Frame Sync 36 Figure...

Page 5: ...ulators Integrated Battery Charger RoHS compliant Small outline 22 56 x 15 01 mm Interfaces USB v2 0 Standard RS232 UART for communicating with other devices 1200 baud to 3Mbaud Serial Peripheral Inte...

Page 6: ...MM516 User s Manual 6 Revision 1 4 7 8 2011 Hardware Description Manual 1 2 Block Diagram Figure 1 Simplified Block Diagram of MM516...

Page 7: ...MM516 User s Manual 7 Revision 1 4 7 8 2011 Hardware Description Manual 1 3 Pin Configuration Figure 2 Pin Configuration for the MM516 and PCB Layout 1 4 Pin Description...

Page 8: ...MM516 User s Manual 8 Revision 1 4 7 8 2011 Hardware Description Manual...

Page 9: ...MM516 User s Manual 9 Revision 1 4 7 8 2011 Hardware Description Manual Table 1 Pin Description...

Page 10: ...asic Operating Information 2 1 Power Supply The MM516 is supplied from a single external regulated 3 3V supply voltage VDD This supply voltage must always be present The BlueCore 5 chip contains an in...

Page 11: ...g to the measured RSSI value keeping the first mixer input signal within a limited range This improves the dynamic range of the receiver improving performance in interference limited environments 3 2...

Page 12: ...heck Encryption Data whitening Access code correlation Audio transcoding The following voice data translations and operations are performed by firmware A law law linear voice data from host A law law...

Page 13: ...ed for low power consumption and efficient use of memory 3 6 1 Programmable I O BlueCore 5 chip has a total of 18 programmable I O terminals 16 digital and 2 analog These are controlled by firmware ru...

Page 14: ...ooth processing and the application program to be shared in different ways between the internal RISC microcontroller and an external host processor if any The upper layers of the Bluetooth stack above...

Page 15: ...ns Standard Bluetooth power saving mechanisms Hold Sniff and Park modes including Forced Hold Dynamic control of peers transmit power via LMP Master Slave switch Broadcast Channel quality driven data...

Page 16: ...BlueCore5 Multimedia External external pins This is normally used to build a battery monitor A block of BCCMD commands provides access to the BlueCore5 Multimedia External Persistent Store PS configur...

Page 17: ...e 5 chip a UART software driver is supplied that presents the L2CAP RFCOMM and SDP APIs to higher Bluetooth stack layers running on the host The code is provided as C source or object code 4 4 CSR Dev...

Page 18: ...n Figure 4 When BlueCore 5 chip is connected to another digital device UART_RX and UART_TX transfer data between the two devices The remaining two signals UART_CTS and UART_RTS can be used to implemen...

Page 19: ...a host to initialize the system to a known state Also BlueCore 5 chip can emit a break character that may be used to wake the host Figure 5 Break Signal Note The DFU boot loader must be loaded into th...

Page 20: ...MM516 User s Manual 20 Revision 1 4 7 8 2011 Hardware Description Manual Table 3 Standard Data Rates...

Page 21: ...hereby allowing communication to BlueCore 5 chip via the UART All UART bypass mode connections are implemented using CMOS technology and have signalling levels of 0V and VDD_PADS In order to apply the...

Page 22: ...h section 7 1 5 of the USB specification v1 2 The internal pull up pulls USB_DP high to at least 2 8V when loaded with a 15k 5 pull down resistor in the hub host when VDD_PADS 3 1V This presents a The...

Page 23: ...B Connections for Self Powered Mode The terminal marked USB_ON can be any free PIO pin The PIO pin selected must be registered by setting PSKEY_USB_PIO_VBUS to the corresponding pin number Note USB_ON...

Page 24: ...s accomplished by setting PSKEY_USB_MAX_POWER 0x2c6 This is higher than for a Class 2 application due to the extra current drawn by the Transmit RF PA When selecting a regulator be aware that VBUS may...

Page 25: ...specification no wires exist for them inside the USB cable but can be useful when embedding BlueCore 5 chip into a circuit where no external USB is visible to the user Both control lines are shared w...

Page 26: ...ial Peripheral Interface BlueCore 5 chip uses 16 bit data and 16 bit address serial peripheral interface where transactions may occur when the internal processor is running or is stopped This section...

Page 27: ...MM516 User s Manual 27 Revision 1 4 7 8 2011 Hardware Description Manual...

Page 28: ...An 8 bit read command 00000011 is sent first C 7 0 followed by the address of the location to be read A 15 0 BlueCore 5 chip then outputs on SPI_MISO a check word during T 15 0 followed by the 16 bit...

Page 29: ...ardware on BlueCore 5 chip allows the data to be sent to and received from a SCO connection Up to three SCO connections can be supported by the PCM interface at any one time BlueCore 5 chip can operat...

Page 30: ...Core 5 chip is configured as PCM master generating PCM_SYNC and PCM_CLK then PCM_SYNC is 8 bits long When BlueCore 5 chip is configured as PCM Slave PCM_SYNC may be from two consecutive falling edges...

Page 31: ...me Sync Shown with 16 bit Sample As with Long Frame Sync BlueCore 5 chip samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge PCM_OUT may be configured to be high imp...

Page 32: ...nd Sample Formats BlueCore 5 chip can receive and transmit on any selection of the first four slots following each sync pulse Slot durations can be either 8 or 16 clock cycles Durations of 8 clock cyc...

Page 33: ...Manual Figure 18 16 bit Slot Length and Sample Format 5 4 7 Additional Features BlueCore 5 chip has a mute facility that forces PCM_OUT to be 0 In master mode PCM_SYNC may also be forced to 0 while ke...

Page 34: ...Revision 1 4 7 8 2011 Hardware Description Manual 5 4 8 PCM Timing Information Table 5 PCM Master Timing a Assumes normal system clock operation Figures will vary during low power modes when system cl...

Page 35: ...MM516 User s Manual 35 Revision 1 4 7 8 2011 Hardware Description Manual Figure 19 PCM Master Timing Long Frame Sync Figure 20 PM Master Timing Short Frame Sync...

Page 36: ...MM516 User s Manual 36 Revision 1 4 7 8 2011 Hardware Description Manual Table 6 PCM Slave Timing...

Page 37: ...MM516 User s Manual 37 Revision 1 4 7 8 2011 Hardware Description Manual Figure 21 PCM Slave Timing Long Frame Sync Figure 22 PCM Slave Timing Short Frame Sync...

Page 38: ...an be either 8 or 16 cycles of PCM_CLK determined by LONG_LENGTH_SYNC_EN in PSKEY_PCM_CONFIG32 This equation describes PCM_CLK frequency when being generated using the internal 48MHz clock f CNT_RATE...

Page 39: ...MM516 User s Manual 39 Revision 1 4 7 8 2011 Hardware Description Manual...

Page 40: ...signals One pin is allocated to decoupling for the on chip band gap reference voltage the other two may be configured to provide additional functionality Auxiliary functions available via these pins i...

Page 41: ...sources RESETB pin power on reset a UART break character or via a software configured watchdog timer The RESETB pin is an active low reset and is internally filtered using the internal low frequency c...

Page 42: ...MM516 User s Manual 42 Revision 1 4 7 8 2011 Hardware Description Manual 5 8 1 Pin States on Reset Table 9 Pin States on Reset...

Page 43: ...ep mode or in reset When this regulator is not used the terminals BAT_P and LX must be grounded or left unconnected 5 9 2 Low voltage Linear Regulator The on chip low voltage regulator is used to powe...

Page 44: ...Manual 44 Revision 1 4 7 8 2011 Hardware Description Manual 6 Electrical Characteristics 6 1 Absolute Maximum Ratings Table 10 Absolute Maximum Ratings 6 2 DC Characteristics Table 11 Typical DC Char...

Page 45: ...MM516 User s Manual 45 Revision 1 4 7 8 2011 Hardware Description Manual 6 3 Radio Characteristics Basic Data Rate...

Page 46: ...MM516 User s Manual 46 Revision 1 4 7 8 2011 Hardware Description Manual Table 12 Radio Characteristics Basic Data Rate...

Page 47: ...MM516 User s Manual 47 Revision 1 4 7 8 2011 Hardware Description Manual 6 4 Radio Characteristics Enhanced Data Rate...

Page 48: ...MM516 User s Manual 48 Revision 1 4 7 8 2011 Hardware Description Manual Figure 13 Radio Characteristics Enhanced Data Rate...

Page 49: ...MM516 User s Manual 49 Revision 1 4 7 8 2011 Hardware Description Manual 7 Package Information 7 1 Package Marking Figure 24 Package Dimensions and Pin 1 Marking...

Page 50: ...at conform to the following guidelines Six layer PCB the following layer stack should be used Figure 25 Six Layer Stackup Four layer PCB the following layer stack should be used Figure 26 Four Layer S...

Page 51: ...Strip Trace PCB 2 Using a 4 layer PCB a micro strip with a total length of 0 500 is used to connect the RF output pad of the MM516 module pad 1 to a PCB edge mounted SMA connector Linx CONREVSMA003 0...

Page 52: ...s no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the e...

Page 53: ...isions of Directive 1999 5 EC As a result of the conformity assessment procedure described in Annex III of the Directive 1999 5 EC the end customer equipment is labeled as shown in Section 8 10 The MM...

Page 54: ...l Directive 1999 5 EC Radio and Telecommunications Terminal Equipment Directive R TTE The conformity assessment procedure used for this declaration is Annex IV of this Directive Product compliance has...

Page 55: ...eils radio exempts de licence L exploitation est autoris e aux deux conditions suivantes 1 l appareil ne doit pas produire de brouillage et 2 l utilisateur de l appareil doit accepter tout brouillage...

Page 56: ...el Design of the Host Product The following information is required either on a label attached to the host product or silkscreened onto the product itself If the device is less than 4 x 4 the lower te...

Page 57: ...with the limits for a Class B digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation...

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