MM516
User's Manual
21
Revision 1.4 7-8-2011
Hardware Description Manual
Figure 6
UART Bypass Architecture
5.1.1 UART Configuration While RESET is Active
The UART interface for BlueCore 5 chip while the chip is being held in reset is tristate. This will allow the user
to daisy chain devices onto the physical UART bus. The constraint on this method is that any devices connected to
this bus must tristate when BlueCore 5 chip reset is de-asserted and the firmware begins to run.
5.1.2 UART Bypass Mode
Alternatively, for devices that do not tristate the UART bus, the UART bypass mode on BlueCore 5 chip can be
used. The default state of BlueCore 5 chip after reset is de-asserted; this is for the host UART bus to be
connected to the BlueCore 5 chip UART, thereby allowing communication to BlueCore 5 chip via the UART.
All UART bypass mode connections are implemented using CMOS technology and have signalling levels of 0V and
VDD_PADS.
In order to apply the UART bypass mode, a BCCMD command will be issued to BlueCore 5 chip. Upon this
issue, it will switch the bypass to PIO[7:4] as Figure 7 indicates. Once the bypass mode has been invoked,
BlueCore 5 chip will enter the Deep Sleep state indefinitely.
In order to re-establish communication with BlueCore 5 chip, the chip must be reset so that the default
configuration takes effect.
It is important for the host to ensure a clean Bluetooth disconnection of any active links before the bypass mode is
invoked. Therefore, it is not possible to have active Bluetooth links while operating the bypass mode.
5.1.3 Current Consumption in UART Bypass Mode
The current consumption for a device in UART bypass mode is equal to the values quoted for a device in standby
mode.
