MM516
User's Manual
31
Revision 1.4 7-8-2011
Hardware Description Manual
5.4.3 Short Frame Sync
In Short Frame Sync, the falling edge of PCM_SYNC indicates the start of the PCM word. PCM_SYNC is always
one clock cycle long.
When configured as the Slave of the PCM interface, BlueCore 5 chip accepts PCM_CLK rates up to 2048kHz.
Figure 15
Short Frame Sync (Shown with 16-bit Sample)
As with Long Frame Sync, BlueCore 5 chip samples PCM_IN on the falling edge of PCM_CLK and transmits
PCM_OUT on the rising edge. PCM_OUT may be configured to be high impedance on the falling edge of PCM_CLK
in the LSB position or on the rising edge.
5.4.4 Multi-slot Operation
More than one SCO connection over the PCM interface is supported using multiple slots. Up to three SCO
connections can be carried over any of the first four slots.
Figure 16
Multi-slot Operation with Two Slots and 8-bit Companded Samples
