4.16 Controller Link Signals
Name
Type
Description
CL_RST1#
(Mobile Only) /
TP20 (Desktop
Only)
O
Controller Link Reset 1:
Controller Link reset that connects
to a Wireless LAN Device supporting Intel® Active
Management Technology.
CL_CLK1
(Mobile Only) /
TP18 (Desktop
Only)
I/O
Controller Link Clock 1:
bi-directional clock that connects to
a Wireless LAN Device supporting Intel® Active Management
Technology.
CL_DATA1
(Mobile Only) /
TP19 (Desktop
Only)
I/O
Controller Link Data 1:
bi-directional data that connects to a
Wireless LAN Device supporting Intel® Active Management
Technology.
4.1.17 Serial Peripheral Interface (SPI) Signals
Name
Type
Description
SPI_CS0#
O
SPI Chip Select 0:
Used as the SPI bus request signal.
SPI_CS1#
O
SPI Chip Select 1:
Used as the SPI bus request signal.
SPI_MISO
I
SPI Master IN Slave OUT:
Data input pin for Ibex Peak.
SPI_MOSI
O
SPI Master OUT Slave IN:
Data output pin for Ibex Peak.
NOTE:
This signal is sampled as a functional strap. See
Section 4.30 for more details.There is a weak integrated pull-
down resistor on this pin.
SPI_CLK
O
SPI Clock:
SPI clock signal, during idle the bus owner will
drive the clock signal low. 17.86 MHz and 31.25.
