6.7.10
Scratchpad
This register is an 8-bit read/write register for scratchpad data or test purposes. Writes
have no impact on the operation of the UART. When the UART is configured for
extended FIFO size (FIFO_SIZE ≠ 0b00) and FIFO mode is enabled, this register
provides a secondary function: it indicates the actual number of bytes in the receive FIFO
when a timeout interrupt is generated.
UART Scratchpad Register (Offset 0x7)
Bit
Name
Access
Default
Description
7:0
SCRATCH
R/W
0x00
Scratchpad data / number of bytes in
receive FIFO
6.7.11
Divisor Latch
The UART contains a programmable baud-rate generator to divide the 33.33 MHz
reference clock down to the serial data rate. The divisor is a 16-bit value contained in two
byte-wide registers, one for the MSB and one for the LSB. For asynchronous mode, the
clock is set to 16× the bit rate.
UART Divisor (LSB) Register (Offset 0x0, DLAB=1)
Bit
Name
Access
Default
Description
7:0
DIV[7:0]
R/W
0x00
LSB of baud-rate generator divisor
UART Divisor (MSB) Register (Offset 0x1, DLAB=1)
Bit
Name
Access
Default
Description
7:0
DIV[15:8]
R/W
0x00
MSB of baud-rate generator divisor
The following table provides the divisor values for some common serial data rates.
Baud-Rate Divisor Settings
Baud Rate
Pre-Divide
Disable
Divisor
300
0
384
1200
0
96
2400
0
48
9600
0
12
19200
0
6
38400
0
3
57600
0
2
115.2 k
0
1
230.4 k
1
9
64
GFK-2896
Mini COM Express Type 10 Module mCOM10-L1500
For public disclosure
Summary of Contents for Mini COM Express 10
Page 10: ...Notes 10 GFK 2896 Mini COM Express Type 10 Module mCOM10 L1500 For public disclosure...
Page 14: ...Notes 14 GFK 2896 Mini COM Express Type 10 Module mCOM10 L1500 For public disclosure...
Page 18: ...Notes 18 GFK 2896 Mini COM Express Type 10 Module mCOM10 L1500 For public disclosure...
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