6.7.7
Modem Control
This register controls the UART interface to a modem.
UART Modem Control Register (Offset 0x4)
Bit
Name
Access
Default
Description
7:05
—
R
0b000
Reserved
4:0
LOOPBACK
R/W
0
Loop-back mode
0: Normal operation
1: Loop-back operation. In this mode, the
serial transmit output is set to 1, the transmit
shift register is internally connected to the
receive shift register, DTR is connected to
DSR, RTS is connected to CTS, OUT1 is
connected to RI, and OUT2 is connected to
DCD.
3:0
OUT2
R/W
0
Output 2. In Loop-back mode, connected to
Data Carrier Detect input.
2:0
OUT1
R/W
0
Output 1. In Loop-back mode, connected to
Ring Indicator input.
1:0
RTS
R/W
0
External Request To Send signal control
0: RTS is set to 1
1: RTS is set to 0
0:0
DTR
R/W
0
External Data Terminal Ready signal control
0: DTR is set to 1
1: DTR is set to 0
FPGA Registers
GFK-2896 Hardware Reference Manual 61
For public disclosure
Summary of Contents for Mini COM Express 10
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