Freescale Semiconductor PowerQUICC III MPC8541E, Manuallines

Page: 22 / 24

PowerQUICC III MPC8555E and MPC8541E Bring-Up Guidelines, Rev. 5
22 Freescale Semiconductor
Functional Blocks
For the TSEC receive, first turn off the receiver to prevent any additional data from coming in. Then the
graceful stop should be enabled by setting the DMACTL[GRS] bit. Wait for confirmation by polling the
IEVENT[GRSC] bit.
6.7.2 Termination of TSEC Signals During Normal Operation
It is recommended that the signal integrity be verify by simulating with the current IBIS model.
6.7.3 Termination of Unused TSEC Signals
Termination is not needed on output signals. For I/Os, tie signals high or low through a resistor.
Recommended resistor values are 2–10 K
Ω
. For inputs, tie signals to their inactive state through a resistor;
clock inputs may be tied high or low. Recommended resistor values are 2–10 K
Ω
.
6.8 Termination Summary for Unused Signals
Table 10 summarizes the recommended terminations for unused interfaces or unused pins. Termination is
not needed on outputs, only inputs. Suggested resistor values are between 2–10 K
Ω
. In general, inputs can
be tied together to a single resistor. I/Os must be tied off with a single resistor per I/O except on the PCI
interface (see
Section 6.6, “PCI” ).
Note that if you are not using the local bus or the TSEC, must still configure the appropriate power-on reset
signals for these interfaces. However, these particular power-on reset pull-ups and pull-downs can be left
alone during normal operation because the interfaces are not used.
Table 10. Termination of Unused Signals Summary
Block Termination Needed on Unused Inputs Exceptions
CPM
If Port A-D pins are not re-programmed as outputs,
then:
• Tie I/Os high or low through resistor
• Tie inputs to inactive state through resistor —
DDR
Tie pins high or low through resistor —
I
2
C
Tie pins high through resistor —
PCI
Tie I/Os high or low through resistor
Tie inputs to inactive state through resistor POR pins PCI1_GNT[1:4], PCI2_GNT[1:4] and
PCI1_REQ64
TSEC
Tie I/Oshigh or low through resistor
Tie inputs to inactive state through resistor POR pins TSEC1_TXD[4:7], TSEC2_TXD[2:7];
manufacturing test pins TSEC1_TXD[0:3]
Local Bus
Tie I/Os high or low through resistor
Tie inputs to inactive state through resistor POR pins LA[27:31], LALE, LGPL[0:3], LGPL5, LWE[0:3]