Advance Information
MC68HC(7)08KH12
—
Rev. 1.1
236
Freescale Semiconductor
•
Return of all enabled keyboard interrupt pins to logic 1 — As long
as any enabled keyboard interrupt pin is at logic 0, the keyboard
interrupt remains set.
The vector fetch or software clear and the return of all enabled keyboard
interrupt pins to logic 1 may occur in any order.
If the MODEF bit is clear, the keyboard interrupt pin is
falling-edge-sensitive only. With MODEF clear, a vector fetch or
software clear immediately clears the keyboard interrupt request.
Reset clears the keyboard interrupt request and the MODEF bit, clearing
the interrupt request even if a keyboard interrupt pin stays at logic 0.
The keyboard flag bit (KEYFF) in the keyboard status and control
register can be used to see if a pending interrupt exists. The KEYFF bit
is not affected by the keyboard interrupt mask bit (IMASKF) which
makes it useful in applications where polling is preferred.
To determine the logic level on a keyboard interrupt pin, disable the
pull-up device, use the data direction register to configure the pin as an
input and then read the data register.
NOTE:
Setting a keyboard interrupt enable bit (KBFIEx) forces the
corresponding keyboard interrupt pin to be an input, overriding the data
direction register.
15.6.2 Port-F Keyboard Initialization
When a keyboard interrupt pin is enabled, it takes time for the internal
pullup to reach a logic 1. Therefore a false interrupt can occur as soon
as the pin is enabled.
To prevent a false interrupt on keyboard initialization:
1. Mask keyboard interrupts by setting the IMASKF bit in the
keyboard status and control register.
2. Write to DDRFx bits to make the port pin an input pin.
3. Enable the KBI pins by setting the appropriate KBFIEx bits in the
keyboard interrupt enable register.
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