The following discussion applies to those platforms that control the muxing of a pin
through the general purpose input/output (GPIO) module.
If the hardware modes are chosen at the system integration level, this pin is dedicated
only to that purpose which can not be changed by software. Otherwise, the GPIO module
needs to be configured properly to serve a particular purpose that is dictated with the
system (board) design.
• If this pin is connected to an external UART transceiver, it should be configured as
the primary function.
• If this pin is connected to an external Ethernet controller for interrupting the core, it
should be configured as GPIO input pin with interrupt enabled.
The software does not have control over what function a pin should have. The software
only configures a pin for that usage according to the system design.
3.5.6.1 GPIO Hardware Operation
The GPIO controller module is divided into MUX control and PULLUP control sub
modules. The following sections briefly describe the hardware operation. For detailed
information, refer to the relevant device documentation.
3.5.6.1.1 Muxing Control
The GPIO In Use Registers control a multiplexer in the GPIO module.
The settings in these registers choose if a pin is utilized for a peripheral function or for its
GPIO function. One 32-bit general purpose register is dedicated to each GPIO port.
These registers may be used for software control of IOMUX block of the GPIO.
3.5.6.1.2 PULLUP Control
The GPIO module has a PULLUP control register (PUEN) for each GPIO port to control
every pin of that port.
3.5.6.2 GPIO Software Operation (general)
The GPIO software implementation provides an API to setup pin functions and pad
features.
Chapter 3 Machine Specific Layer (MSL)
i.MX 6SoloLite Linux Reference Manual, Rev. L3.0.35_4.1.0, 09/2013
Freescale Semiconductor, Inc.
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