specific hardware module. A GPIO pin, is controlled by the user through software with
further configuration through the GPIO module. For example, the TXD1 pin might have
the following functions:
• TXD1: internal UART1 Transmit Data. This is the primary function of this pin.
• UART2 DTR: alternate mode 3
• LCDC_CLS: alternate mode 4
• GPIO4[22]: alternate mode 5
• SLCDC_DATA[8]: alternate mode 6
If the hardware modes are chosen at the system integration level, this pin is dedicated
only to that purpose and cannot be changed by software. Otherwise, the IOMUX module
needs to be configured to serve a particular purpose that is dictated by the system (board)
design.
• If the pin is connected to an external UART transceiver and therefore to be used as
the UART data transmit signal, it should be configured as the primary function.
• If the pin is connected to an external Ethernet controller for interrupting the ARM
core, it should be configured as GPIO input pin with interrupt enabled.
The software does not have control over what function a pin should have. The software
only configures pin usage according to the system design.
3.5.1 IOMUX Hardware Operation
The following information applies only to those processors that have an IOMUX
hardware module.
The IOMUX controller registers are briefly described in this section.
For detailed information, see the pin multiplexing section of the IC reference manual.
• SW_MUX_CTL: Selects the primary or alternate function of a pin, and enables
loopback mode when applicable.
• SW_SELECT_INPUT: Controls pin input path. This register is only required when
multiple pads drive the same internal port.
• SW_PAD_CTL: Controls pad slew rate, driver strength, pull-up/down resistance, and
so on.
3.5.2 IOMUX Software Operation
The IOMUX software implementation provides an API to set up pin functions and pad
features.
Chapter 3 Machine Specific Layer (MSL)
i.MX 6SoloLite Linux Reference Manual, Rev. L3.0.35_4.1.0, 09/2013
Freescale Semiconductor, Inc.
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