MFR4310 Reference Manual, Rev. 2
Freescale Semiconductor
223
Chapter 6
Clocks and Reset Generator (CRG)
6.1
Introduction
6.1.1
Overview
This document describes the CRG operation in functional mode and only those aspects of it which are
useful users. Additional topics as system clock generation or functionality while the CRG is in another
operational modes are out of the scope of this documentation.
6.1.2
Features
The CRG includes the following main features:
•
System reset generation from power-on and external reset events
•
System reset generation from low voltage reset event
•
Controllable system reset generation under low quality clock situations (clock monitor)
•
System reset indication
•
Host interface selection
•
Control signals selection for
CLKOUT
clock output
•
System clocks generation
•
Reset glitch filter
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