Manual de Instalación
/ Installation Manual
DRAM Timing Selectable
This item allows you to select the DRAM timing value by SPD data or Manual by yourself.
•
Manual.
•
By SPD
(default).
CAS Latency Time
This item controls the time delay (in clock cycles - CLKs) that passes before the SDRAM starts to
carry out a read command after receiving it. This also determines the number of CLKs for the
completion of the first part of a burst transfer. In other words, the lower the latency, the faster the
transaction.
•
2
•
2.5
Active to Precharge Delay
This item is the minimum delay time between Active and Precharge
•
5
•
6
•
7
DRAM RAS# to CAS# Delay
This option allows you to insert a delay between the RAS (Row Address Strobe) and CAS (Column
Address Strobe) signals. This delay occurs when the SDRAM is written to, read from or refreshed.
Increasing this delay reduces performance.
•
2
•
3
DRAM RAS# Precharge
This option sets the number of cycles required for the RAS to accumulate its charge before the
SDRAM refreshes. Reducing the precharge time to
2
improves SDRAM performance but if the
precharge time of
2
is insufficient for the installed SDRAM, the SDRAM may not be refreshed properly
and it may fail to retain data.
So, for better SDRAM performance, set the
SDRAM RAS Precharge Time
to
2
but increase it to
3
if you face system stability issues after reducing the precharge time.
•
2
•
3
55/71
E
N
G
L
IS
H
