Feig Electronic ID ISC.MR102, Manual, Page: 121 / 153

Identification Manual ID ISC.MR102
FEIG ELECTRONIC GmbH Page 121 of 153 H01113-4e-ID-B.docx
8.3.7. NXP (I-Code SLI)
Chip ID: 1h = 00000001b (Bit 47 - 40 of UID)
Memory organization: 32 x 4 Byte = 1kBit
Number of blocks 32 (user area: 0
– 27)
Block size 4 byte
WR-OPTION
*
0
Command
Code
Function Mode Comment
non-
addressed
addressed select
0x01 Inventory

- - -
0x02 Stay Quiet

-

-
0x22 Lock Multiple Blocks
   
0x23 Read Multiple Blocks
   
0x24 Write Multiple Blocks
   
0x25 Select

-

-
0x26 Reset to Ready
   
0x27 Write AFI
   
0x28 Lock AFI
   
0x29 Write DSFID
   
0x2A Lock DSFID
   
0x2B Get System Information
   
0x2C Get Multiple Block Security
Status
   

The WR-OPTION will be set automatically by the FEIG Readers if the WR-OPTION pa-
rameter in “CFG4 Transponder Parameters” is set to “00: automatically set”.