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5 -12
5.3.5
Representation of Negative Number
(Beginners should skip this section)
As prior discussion, when the MSB is 1, the number will be a negative number. The FBs-PLC negative numbers are
represented by 2’S Complement, i.e. to invert all the bits (B15
~
B0 or B31
~
B0) of its equivalent positive number (The
so-called 1’S Complement is to change the bits equal 1 to 0 and the bits equal 0 to 1) then add 1. In the above example,
the positive number is 12345. The calculation of its 2’S Complement (i.e. –12345) is described below:
12345
Ö
0 0 1 1 0 0 0 0 0 0 1 1 1 0 0 1
Ö
3039H
1'S
Complement
Ö
1 1 0 0 1 1 1 1 1 1 0 0 0 1 1 0
Ö
CFC6H
of 12345
+
1
2'S Complement
Ö
1 1 0 0 1 1 1 1 1 1 0 0 0 1 1 1
Ö
CFC7H
of 12345
(
−
12345)
5.4 Overflow and Underflow of Increment (+1) or Decrement (-1)
(Beginners should skip this section)
The maximum positive value that can be represented by 16-bit and 32-bit operands are 32767 and 2147483647,
respectively. While the minimum negative values that can be represented by 16-bit and 32-bit operands are –32768
and –2147483648, respectively. When increase or decrease an operand (e.g. when Up/Down Count of a counter or the
register value is +1 or
−
1), and the result exceeds the value of the positive limit of the operand, then “Overflow” (OVF)
occurs. This will cause the value to cycle to its negative limit (e.g. add 1 to the 16-bit positive limit 32767 will change it
to –32768). If the result is smaller than the negative limit of the operand, then “Underflow” (UDF) occurs. This will cause
the value to cycle to its positive limit (e.g. deducting 1 from the negative limit –32768 will change it to 32767) as shown in
the table below. The flag output of overflow or underflow exists in the FO of FBs-PLC and can be used in cascaded
instructions to obtain over 16-bit or 32-bit operation results.