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FATEK FBs-CBE, Manual

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Advanced Function Instruction

 

7 -1 0 3  

FUN120

 

P

 

MAND 

MATRIX AND   

FUN120

 

P

 

MAND 

Ma  :

EN

 Operation control

Ladder symbol 

120P.MAND

Mb  :

L    :

Md  :

 

Ma : Starting register of source matrix a 

Mb : Starting register of source matrix b 
Md : Starting register of destination matrix   
L    : Length of matrix (Ma, Mb and Md) 
Ma, Mb, Md may combine with V, Z, P0~P9 to serve 
indirect address application 

 

WX 

WY 

WM 

WS  TMR CTR

HR

IR

OR

SR

ROR

DR 

K 

XR 

Range 

Ope- 
rand 

WX0 

∣

 

WX240 

WY0 

∣

 

WY240 

WM0 

∣

 

WM1896 

WS0

∣

 

WS984

T0 

∣

 

T255

C0

∣

 

C255

R0

∣

 

R3839

R3840

∣

 

R3903

R3904

∣

 

R3967

R3968

∣

 

R4167

R5000

∣

 

R8071

D0 

∣

 

D4095 

2 

∣

 

256 

V

、

Z

 

P0~P9

Ma 

○

 

○

 

○

 

○

 

○

○

○

○

○

○

○

○

 

 

○

 

Mb 

○

 

○

 

○

 

○

 

○

○

○

○

○

○

○

○

 

 

○

 

Md  

○

 

○

 

○

 

○

○

○

 

○

○

*

○

*

○

 

 

○

 

L  

   

 

 

○

 

 

 

○

*

○

 

○

 

 

 

z

  When operation control "EN" = 1 or "EN

↑

" ( 

P

 instruction) has a 

transition from 0 to 1, this instruction will perform a logic AND (only 
if 2 bits are 1 will the result be 1, otherwise it will be 0)operation 
between two source matrixes with a length of L, Ma and Mb. The 
result will then be stored in the destination matrix Md, which is also 
the same length (the AND operation is done by bits with the same 
bit numbers). For example, if Ma

0

 = 0, Mb

0

  =  1,  then  Md

0

 = 0; if 

Ma

1

 = 1, Mb

1

 = 1, then Md

1

 = 1; etc, right up until AND reaches 

Ma

16L-1

 and Mb

16L-1

. 

Ma

Mb

AND

Md

L

 

X0

EN

R       0

120P.MAND

L   :

Ma :
Mb :

Md :

R     10
R     20

5

 

z

  In the program at left, when X0 goes from 0

→

1, then 

matrix Ma, comprised by R0 to R4, and matrix Mb, 
comprised by R10 to R14, will do an AND operation. The 
results will be stored back in matrix Md, comprised by 
R20 to R24. The result is shown at right in the diagram 
below. 

 

Ma

15

 

↓

 

Ma 

Ma

0

↓

Mb

15

 

↓

 

Mb 

Mb

0

↓

Md

15

 

↓

 

Md 

Md

0

↓

R0  0  0  0  0  0  0  0  0  0  0  0  0  0 0  0  0 

R10  1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

R20 0 0 0  0  0  0  0  0  0  0  0  0  0 0 0 0

R1  1  1  1  1  1  1  1  1  0  0  0  0  0 0  0  0 

R11  0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

R21 0 0 0  0  0  0  0  0  0  0  0  0  0 0 0 0

R2  0  0  0  0  0  0  0  0  1  1  1  1  1 1  1  1 

R12  0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

R22 0 0 0  0  0  0  0  0  1  1  1  1  1 1 1 1

R3  0  0  0  0  0  0  0  0  0  0  0  0  0 0  0  0 

R13  0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R23 0 0 0  0  0  0  0  0  0  0  0  0  0 0 0 0

R4  1  1  1  1  1  1  1  1  1  1  1  1  1 1  1  1 

R14  1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

R24 1 1 1  1  1  1  1  1  1  1  1  1  1 1 1 1

↑

 

Ma

79

 

↑

Ma

64

↑

 

Mb

79

 

↑

Mb

64

↑

 

Md

79

 

↑

Md

64

Before execution 

After execution 

 

Summary of Contents for FBs-CBE

Page 1: ...H1 12 1 7 4 Digital I O Expansion Module H1 13 1 7 5 High Density Digital I O Expansion Module H1 14 1 7 6 Numeric I O Expansion Module H1 14 1 7 7 Analog I O Expansion Module H1 14 1 7 8 Temperature Input Module H1 15 1 7 9 Expansion Power H1 15 1 7 10 Communication Module CM H1 16 1 7 11 Communication Board CB H1 17 1 8 Drawings with External Dimensions H1 18 Chapter 2 System Architecture 2 1 Si...

Page 2: ...of Main Expansion Units and Current Consumption of Expansion Module H5 4 5 3 1 Residual Capacity of Main Unit Expansion Unit H5 4 5 3 2 Maximum Current Consumption of Expansion Module H5 5 5 4 Requirement on Power Sequence of Main Unit and Expansion Unit Module H5 6 Chapter 6 Digital Input DI Circuits 6 1 Specifications of Digital Input DI Circuits H6 1 6 2 Structure and Wiring of 5VDC Ultra High ...

Page 3: ...Suppression H7 6 7 5 1 Protection of Relay Contact and Noise Suppression H7 6 7 5 2 Protection of Transistor and Noise Suppression H7 8 Chapter 8 Test Run Monitoring and Maintenance 8 1 Inspection after Wiring and before First Time Power on H8 1 8 2 Test Run and Monitoring H8 1 8 3 LED Indications of Main Units and Troubleshooting H8 2 8 4 Maintenance H8 4 8 5 The charge of battery recycle of used...

Page 4: ...Techniques 1 13 Chapter 2 FBS PLC Memory Allocation 2 1 FBS PLC Memory Allocation 2 1 2 2 Digital and Register Allocations 2 2 2 3 Special Relay Details 2 3 2 4 Special Registers Details 2 8 Chapter 3 FBS PLC Instruction Lists 3 1 Sequential Instructions 3 1 3 2 Function Instructions 3 2 Chapter 4 Sequential Instructions 4 1 Valid range of the Operand of Sequential Instructions 4 1 4 2 Element Des...

Page 5: ...of Numeric Value 5 11 5 3 5 Representation of Negative Number 5 12 5 4 Overflow and Underflow of Increment 1 or Decrement 1 5 12 5 5 Carry and Borrow in Addition Subtraction 5 13 Chapter 6 Basic Function Instructions z T Timer 6 2 z C Counter 6 5 z Set SET 6 8 z Reset RESET 6 10 z Master control loop start FUN0 6 12 z Master control loop end FUN01 6 14 z Skip start FUN02 6 15 z Skip end FUN03 6 17...

Page 6: ...5 7 72 z Cumulative timer instructions FUN87 89 7 73 7 74 z Watchdog timer instructions FUN90 91 7 75 7 76 z High speed counting timing FUN92 93 7 77 7 78 z Report printing instructions FUN94 7 79 7 80 z Slow up Slow down instructions FUN95 7 81 7 82 z Table instructions FUN100 114 7 84 7 101 z Matrix instructions FUN120 130 7 103 7 113 z NC positioning instructions FUN139 143 7 114 7 119 z Enable...

Page 7: ...s before operation 2 1 3 The Main Functions of FBS DAP 3 1 4 Setter Functions of General Information 3 1 5 FUN Functions 5 1 5 1 In and out of FUN functions 5 1 5 2 FUN function description 6 1 6 Wireless card reading functions 9 1 7 Special message display function 11 1 7 1 Message display application 11 1 7 2 The Information formats of messages ASCII Table 12 ...

Page 8: ...as an example for illustration OUT Y Y6 Y1 AC100 240V C0 Y0 Y4 Y2 C2 Y3 PORT0 Y5 C4 C6 0 4 8 2 I 6 5 9 Y8 Y7 Y9 3 7 IN X X8 X0 PROGRAMMABLE CONTROLLER 24V OUT S S RX TX RUN ERR I2 I3 POW X4 X2 X1 X3 0 8 4 2 I I0 9 6 5 X6 X5 X7 X12 3 II 7 X10 X9 X11 X13 X10 3 I 2 0 Y2 AC100 240V C0 Y1 Y0 C2 8 Y4 Y3 C4 Y5 Y6 C6 Y7 9 5 6 4 7 X2 TX 24V OUT S S X0 X1 IN X RX ERR OUT Y POW RUN 0 X3 X5 X4 X7 X6 X9 X8 Y8 ...

Page 9: ... units modules One type uses the same case as main unit that of the 90mm 130mm and 175mm while the other two have thinner 40mm and 60mm cases which are for expansion modules All expansion cables left of expansion units modules are flat ribbon cables 6cm long which were soldered directly on the PCB and the expansion header right is a 14Pin Header with this to connect the right adjacent expansion un...

Page 10: ...SRCE I FATEK 3 IN X 2 4 X1 S S X3 X2 X4 擴充輸入 扁平排線接頭 擴充輸出插槽 DIN RAIL卡鉤 螺絲固定孔 ψ4 5 2 輸入狀態 指示燈 輸出狀態 指示燈 擴充輸出插槽蓋板 擴充輸出插槽蓋板 移除之正視圖 Expansion cable connector Screw hole φ 4 5 2 DIN RAIL tab Output status indicator Output expansion slot Front view of output expansion slot with cover plate removed I O terminal block Output expansion cover plate I O terminal block Output expansion slot Expansion cable conn...

Page 11: ...25E CM55E CM25C CM5R 螺絲固定孔 ψ4 5 2 通訊模組擴充扁平排線接頭 插於主機之通訊模組連接插座 Port3 通訊指示燈 Port4 通訊插座 Port3 通訊插座 Port4 通訊指示燈 17 DIN RAIL卡鉤 FBs CM25E PORT4 RS485 ETHERNET G PORT3 RS232 RX TX N T 1 TX 2 TX RX RX 3 6 RUN LNK 乙太網路 Port4 Terminator 附加開關 T ON N OFF Expansion cable connector Screw hole φ 4 5 2 I O Header socket Input status indicator Front view of output expansion header with cover plate Output expansion ...

Page 12: ...ital output Model T 2 points 100KHz 6 points 20KHz output 1 RS232 or USB port expandable up to 5 built in RTC detachable terminal block FBS 10MA Δ 6 points 24VDC digital input up to 10KHz in 4 points 4 Points R T S digital output Model T has 4 points 10KHz output one RS232 or USB port can be expanded up to 3 I O is not expandable FBS 14MA Δ 8 points 24VDC digital input up to 10KHz in 4 points 6 po...

Page 13: ...cable 150cm long FBs 232P0 9M 400 FBs Main unit Port0 RS232 to 9Pin male D Sub communication cable 400cm long Communication Cable FBs USBP0 180 FBs Main unit Port0 USB communication cable standard USB A B Memory Pack FBs PACK FBs PLC Program memory pack with 20Kword program 20Kword register and write protection switch FP 07C Hand held programmer for FBs PLC Programming Device WinProladder WinProla...

Page 14: ... Retentive C200 C239 40 Can be configured as non retentive type CTR Current Counter Value Register 32 Bit Non retentive C240 C255 16 Can be configured as retentive type R0 R2999 3000 Can be configured as non retentive type Retentive D0 D3999 4000 HR DR Non retentive R3000 R3839 840 Can be configured as retentive type Retentive R5000 R8071 3072 When not configured as ROR it can serve as normal regi...

Page 15: ...ution 720Hz 184 32KHz with 1 resolution Max 36 points all of main units have the feature Points 10μS super high speed high speed input 47μS medium speed input Captured input Captured pulse width 470μS mid low speed input Frequency 14KHz 1 8MHz Chosen by frequency at high frequencies X0 X15 Tine constant 0 1 5mS 0 15mS adjustable by step of 0 1mS 1mS Chosen by time constant at low frequencies Setti...

Page 16: ...X19 FBS 32MN 400mA max IN X0 Y1 Y0 Y0 S S 24V OUT X0 SINK Y8 Y10 Y6 Y4 Y3 Y2 Y1 Y2 Y3 C4 Y5 Y7 C8 Y9 Y11 SRCE X1 X1 X2 X4 X4 X3 X5 X6 X5 X8 X7 X9 X10 X11 X12 X16 X13 X14 X15 X18 X17 X19 FBS 32MN D 24VDC max 400mA IN SG0 z 44 point digital I O main unit 28 points IN 16 points OUT AC Power DC Power X19 Y11 Y10 Y8 Y6 Y7 Y4 Y5 Y3 Y2 Y0 Y1 Y4 SG Y0 Y1 SG Y3 Y2 SG Y7 SG Y5 Y6 C8 Y9 X7 AC100 240V X1 24V ...

Page 17: ...6 FBS 14MA D FBS 14MC D 24VDC max 400mA IN z 20 point digital I O main unit 12 points IN 8 points OUT AC Power DC Power AC100 240V C0 Y1 Y0 Y2 C2 Y4 Y3 Y6 Y5 C4 C6 Y7 SINK SRCE 24V OUT S S X0 X2 X1 X4 X3 X8 X6 X5 X7 X10 X9 X11 FBS 20MA FBS 20MC 400mA max IN C0 Y1 Y0 Y2 C2 Y4 Y3 Y6 Y5 C4 C6 Y7 SINK SRCE 24V OUT S S X0 X2 X1 X4 X3 X8 X6 X5 X7 X10 X9 X11 FBS 20MA D FBS 20MC D 24VDC 400mA max IN z 24 ...

Page 18: ...S 40MC max 400mA IN X21 Y15 C4 C0 C2 Y0 Y1 Y3 Y2 Y4 Y9 Y7 C6 Y5 Y6 C8 Y8 C12 Y11 Y10 Y13 Y12 Y14 X5 24V OUT S S X1 X0 X3 X2 X4 X13 X9 X7 X6 X8 X11 X10 X12 X17 X15 X14 X16 X19 X18 X20 SINK SRCE X23 X22 FBS 40MA D FBS 40MC D 24VDC max 400mA IN z 60 point digital I O main unit 36 points IN 24 points OUT AC Power DC Power 24V OUT X28 X12 Y8 Y4 Y1 Y0 C0 AC100 240V C2 Y3 Y2 Y6 C4 C6 Y5 C8 Y7 X4 X0 S S X...

Page 19: ... C3 Y4 C7 C5 Y6 Y8 Y7 S S 24V OUT X5 X1 X4 X2 X3 X8 X6 X7 X10 X9 X11 Y11 Y9 C9 Y10 Y12 C13 Y16 Y14 Y13 Y15 SINK SRCE X19 X15 X14 X13 X16 X18 X17 X22 X20 X21 X24 X23 FBS 40EAP D 24VDC max 400mA IN z 60 point I O expansion unit 36 points IN 24 points OUT AC Power DC Power X20 Y14 C5 AC100 240V C1 Y3 Y2 Y1 C3 Y4 Y5 Y9 Y8 C7 Y6 Y7 C9 Y11 Y10 Y12 C13 Y13 24V OUT S S X3 X1 X2 X5 X4 X6 X10 X9 X7 X8 X11 X...

Page 20: ... C11 Y11 Y12 Y15 Y13 C13 Y14 Y16 Y1 C1 Y2 C3 Y3 Y6 C5 Y4 Y5 Y7 Y8 FBS 16EY z 24 point digital I O module 14 points IN 10 points OUT Y1 C1 Y2 C7 C5 Y4 C3 Y3 Y5 Y6 Y7 S S X1 X2 X3 X4 X5 X6 X7 X8 X9 SRCE Y10 Y8 Y9 SINK X10 X11 X12 X13 X14 FBS 24EA z 40 point digital I O module 24 points IN 16 points OUT X20 Y14 C5 C1 Y3 Y2 Y1 C3 Y4 Y5 Y9 Y8 C7 Y6 Y7 C9 Y11 Y10 Y12 C13 Y13 S S X3 X2 X1 X6 X4 X5 X13 X1...

Page 21: ... display module 8 digits 7SG1 16 digits 7SG2 16 pin 2 54mm Header connector CH1 CH0 FBS 7SG1 2 z Thumbwheel switch multiplex input module 4 digits 8 30Pin 2 54mm Header connector FBS 32DGI 24V NC S2 S4 S6 S8 D1 D3 D5 D7 D9 D11 D13 D15 NC FG 24V S1 S3 S5 S7 D0 D2 D4 D6 D8 D10 D12 D14 NC I 2 30 29 7 62mm fixed terminal block z 6 channel A D analog input module I2 I2 H 2 C I4 I4 I3 I3 3 H C H 4 C I5 ...

Page 22: ...C6 z 16 channel thermocouple input module T5 T15 T10 T8 T7 T7 T8 T9 T9 T10 T11 T11 T12 T12 T14 T13 T13 T14 T0 T0 T1 T1 T2 T2 T4 T3 T3 T4 T15 T6 T5 T6 FBS TC16 z 6 channel RTD input module P4 P2 P2 P3 P3 P4 P5 P5 P0 COM P0 P1 P1 FBS RTD6 z 16 channel RTD input module P0 P1 P2 P3 P4 P5 P6 P6 P5 P4 P3 P2 P1 P0 P7 P7 P8 P8 P9 P10 P11 P12 P13 P13 P12 P11 P10 P9 P14 P15 P14 P15 COM FBS RTD16 7 62mm fixe...

Page 23: ...232 1 RS485 Ethernet FBs CM25E PORT4 RS485 ETHERNET G PORT3 RS232 RX TX N T 1 TX 2 TX RX RX 3 6 RUN LNK z 2 RS485 ports Ethernet FBs CM55E PORT4 RS485 G PORT3 RS485 G T N RX TX T N 1 ETHERNET TX 2 TX RX RX 3 6 RUN LNK z RS232 RS485 Converter FBs CM25C G RX RS232 to RS485 Converter T N FG RX 24V 24V POW z RS485 Repeater N N Repeater FBs CM5R G G T RS485 T FG 24V 24V RX RX POW z 4 ports RS485 HUB 7 ...

Page 24: ...rts PORT1 PORT2 RX TX PROGRAMMABLE CONTROLLER TX RX FBS CB22 z 1 RS485 port PROGRAMMABLE CONTROLLER PORT2 PORT1 TX RX RX TX FBS CB5 z 2 RS485 ports PROGRAMMABLE CONTROLLER PORT2 PORT1 TX RX RX TX FBS CB55 z 1 RS232 1 RS485 ports PORT1 RX PORT2 TX PROGRAMMABLE CONTROLLER TX RX FBS CB25 z 1 Ethernet port LINK CONTROLLER PROGRAMMABLE RX TX ETHERNET FBS CBE 1 7 11 Communication Board CB ...

Page 25: ...over as shown in the figure 4 4 80 60 90 PROGRAMMABLE CONTROLLER 2 4 5 90 7 5 2 Outlook II Main Unit FBS 20M FBS 24M FBS 32M FBS 40M FBS 60M Expansion Module FBS 24EA P FBS 40EA P FBS 60EA P FBS TC16 FBS RTD16 90 W PROGRAMMABLE CONTROLLER 4 4 2 4 5 90 80 7 5 21 W Model 90mm FBS 20M FBS 24M FBS 24EA P FBS TC16 FBS RTD16 130mm FBS 32M FBS 40M FBS 40EA P 175mm FBS 60M FBS 60EA P units mm units mm ...

Page 26: ...of base with different top cover Top cover of Module 1 is shown in the following figure 2 4 5 FATEK 90 20 3 8 21 40 80 90 7 5 4 Outlook IV Communication Module FBS CM22 FBS CM55 FBS CM25 FBS CM25E FBS CM55E FBS CM25C FBS CM5R All modules have the same type of base with different top cover Top cover of Module CM25E is shown in the figure 25 90 90 73 25 21 3 8 2 4 5 7 5 units mm units mm ...

Page 27: ...H1 20 5 Outlook V Programming Panel FP 07C 4 4 53 25 55 5 32 90 188 6 Outlook VI Data Access Panel FB DAP 98 112 148 7 7 14 8 12 17 6 14 75 22 43 9 98 6 5 units mm ...

Page 28: ...e right respectively Port1 Port0 Port2 Port3 Port1 Port4 Port4 USB or RS232 DO Intelligent Peripherals DI Digital I O Expansion Unit Module AO AI Digital Output DO Communication Board Main Unit Digital Input DI Communication Module Ethernet suffix E Module only Port3 Port1 Port2 Port4 Computer Bar Code Reader Diagram Control Man Machine Console Man Machine Interface FP 07C FB DAP R FBs CM25E FBs C...

Page 29: ...tems can be integrated to achieve resources sharing among multiple PLC or PLCs and its host computer It is described as follows 2 2 1 Connection of Multiple FBS PLC CPU Link RS 485 網路 FBS PLC 主機 FBS PLC 主機 FBS PLC 主機 週邊 I O 週邊 I O 週邊 I O As shown in the figure through the usage of high speed RS 485 network can easily establish the connections of 2 254 main units each PLC with its own station numbe...

Page 30: ...e FBs PLC is playing the Slave role FBs PLC supports the FATEK and Modbus protocol Connection can be established as long as the upper level computer or intelligent peripherals use either one of the two protocols In the application in which driver for FATEK or Modbus is not available FATEK also provide standard DDE communication server which enables FBs PLC to connect with any computer system suppo...

Page 31: ... ERR LED and put the error code in Y0 Y3 LED refer the page 8 2 Chapter 8 The corresponding error code will also be indicated in the CPU status register R4049 Warning 1 The maximum length of the I O expansion cable for FBS PLC is 5 meters Cables longer than that will cause incorrect I O operation because of excess signal delay in hardware or noise pickup resulting in damage to equipment or posing ...

Page 32: ... on main units The number of a terminal only represents its order on the expansion unit module For example the first contact is X1 or Y1 the second X2 or Y2 etc All numbers on the expansion unit module begin with 1 The actual number of digital input contact or the output replay however is determined by summing the numbers on all previous expansion units modules and the main unit See the following ...

Page 33: ...7 Segments Display Output uses user friendly BCD number signal Either the magnitude of voltage or current or the value of BCD number is represented by the 16 bit value of the corresponding register The corresponding current voltage signal or BCD value of any IR or OR on the NI O module is named as a Channel CH The channels on the NI module are called numeric input channels NI channels and those on...

Page 34: ... R3852 CH5 R3853 R3909 10 CH1 R3910 13 IR IR IR OR OR C C I2 I3 C I2 H 2 I5 I4 I3 H 4 C C 3 H I4 C I5 H 5 V I U B FATEK POW H 0 10V 5V H 1 24V IN I0 AG I0 I1 I1 POW FATEK C C I V U B FATEK POW 10V 5V H 0 H 1 O1 24V IN O0 AG O1 O0 SINK SRCE Y2 Y1 C1 Y3 C3 Y4 OUT Y I 2 3 POW 4 S S FATEK IN X I 2 3 4 X3 X2 X1 X4 CH1 FATEK POW POW V 1 POW EXT 0 V CH0 OUT Y Y4 Y3 3 7 Y6 Y5 C4 C6 0 4 2 I 6 5 Y7 SINK SRC...

Page 35: ... are independent modules used for the expansion of communication ports port3 and port4 and need to be mounted against the left side of FBs main unit and connected to the main unit via a 14pin connector The labels of communication ports are marked on the cover plate of communication boards and modules from which users can easily identify each port Except that the built in communication port Port0 c...

Page 36: ...ed to keep from noise sources such as high voltage or high current lines and high power switches Other precautions are 4 2 1 Placement of PLC Fixation of FBS PLC which can be fixed by DIN RAIL or screws should place vertically and start from the main unit on the left to the expansion unit on the right A typical figure of placement is shown below OUT Y Y6 Y1 AC100 240V C0 Y0 Y4 Y2 C2 Y3 PORT0 Y5 C4...

Page 37: ...BLE PORT0 TX RX Y9 Y6 C6 Y5 Y7 Y8 SINK SRCE OUT Y IN X RUN ERR POW X0 24V OUT S S X1 X2 X4 X3 X5 X11 X8 X7 X6 X9 X10 X12 X13 400mA max IN max 400mA IN 0 I 2 3 4 5 6 7 8 9 I0 II I2 I3 0 I 2 3 7 6 5 4 8 9 3 2 I 0 7 6 5 4 I I I0 9 8 I2 I3 0 I 2 3 7 6 5 4 9 8 平放 吸頂 橫置 垂直正向 X12 PORT0 AC100 240V C0 Y1 Y0 C2 Y2 CONTROLLER PROGRAMMABLE TX C6 C4 Y3 Y4 Y5 Y6 Y7 Y9 Y8 OUT Y RX ERR RUN POW IN X 24V OUT S S X0...

Page 38: ...il the upper edge of DIN RAIL groove on PLC back touches the upper tab of DIN RAIL Then use this locked in point as a pivot to press the PLC forward on the bottom and lock it in position The procedure is illustrated below 1 2 Dismount 以 Use a long screwdriver to reach in the hole on the DIN RAIL tab Pull out the tab to pulled out position to remove PLC as shown in the figure below 1 2 Make sure th...

Page 39: ...ns and sizes of screw holes in various models of FBS PLC are illustrated in the following 尺寸 A 60mm 2 362in 90mm 3 543in 21mm 0 827in 4mm 0 157in 2 4 5 mm 0 177 in 尺寸 B 90mm 3 543in 90mm 3 543in 4mm 0 157in 21mm 0 827in 2 4 5 mm 0 177 in 尺寸 C 4mm 0 157in 90mm 3 543in 21mm 0 827in 130mm 5 118in 2 4 5 mm 0 177 in Size A Size B Size C ...

Page 40: ...mm 0 827in 1750mm 6 890in 2 4 5 mm 0 177 in 尺寸 D 尺寸 E 90mm 3 543in 21mm 0 827in 40mm 1 575in 20mm 0 787in 3 8mm 0 150in 2 4 5 mm 0 177 in 尺寸 F 25mm 0 984in 90mm 3 543in 21mm 0 827in 2 4 5 mm 0 177 in 3 8mm 0 150in Size E Size F Size D ...

Page 41: ...horter wires are preferred It is advised that the length of I O wiring does not exceed 100m 10m for high speed input 4 Input wiring should be separated from output or power wiring at least 30 50mm apart In case separation is not possible adopt vertical crossing no parallel wiring is allow 5 The pitch of FBS PLC terminal block is 7 62mm The torque for screw and suggested terminal is shown below 7 6...

Page 42: ...d POW 24 are to be installed on a main unit or inside an expansion unit where their appearances are invisible The following table lists the specifications Model Item POW 14 POW 24 FBS EPOW Voltage 100 240VAC 15 10 Input Range Frequency 50 60HZ 5 5 Max Power Consumption 21W 36W 21W Inrush Current 20A 264VAC Allowable Power Interrupt 20ms min Fuse Spec 1A 250VAC Isolation Type Transformer Photo Coup...

Page 43: ...OUT control OR IN CONVERTER DC DC AC DC Power Supply AC DC Power Supply 24VDC output for input input Sensor input Sensor input Sensor 24VDC output for input 5 2 Specifications of DC Power Sourced Power Supply and Wiring The available DC power sourced power supplies of FBS PLC are the 10 Watt POW 10 D supply for 10 14PTs main unit the 16 Watt POW 16 D supply for 20 60PTs main expansion unit and the...

Page 44: ...ram of DC power supply in main expansion unit is shown below Also be cautious about the following Please follow the wiring schemes regulated by local national standards to choose single pole switch break 24V or double pole switch break both 24V and 24V in order to turn on or off DC input power Wiring of 24V input power must be connected to the terminal labeled by while the 24V end is connected to ...

Page 45: ...2 mA 315mA 262mA FBS 40MC 688 mA 295mA 244mA FBS 60MC 644 mA 255mA 190mA FBS 20MN 710mA 310mA 325 mA FBS 32MN 670mA 297mA 280 mA Main Unit FBS 44MN 627 mA 276 mA 250 mA FBS 24EAP 948 mA 350mA 337mA FBS 40EAP 918 mA 320mA 292mA Expansion Unit FBS 60EAP 880 mA 280mA 238mA except differential inputs X0 1 4 5 8 9 12 13 z Suffixed code hollow means AC power D DC power z In the above table the residual ...

Page 46: ...0 mA 130 mA FBS 4A2D 30 mA 80 mA FBS TC2 TC6 32 mA 30 mA FBS RTD6 32 mA 30 mA FBS TC16 33 mA 30 mA Numeric I O Expansion Module FBS RTD16 32 mA 30 mA FBS CB2 13 mA FBS CB22 25 mA FBS CB5 55 mA FBS CB55 100 mA Communication Board CB FBS CB25 60 mA FBS CM22 18 mA FBS CM55 100 mA FBS CM25 67 mA FBS CM25E 110 mA FBS CM55E 120 mA FBS CM25C 20 mA FBS CM5R 20 mA Communication Module CM FBS CM5H 76 mA FBS...

Page 47: ...r but different switches or external power supply is used for expansion modules time sequence of both powers should be considered To solve the problem of the expansion unit module power not get ready before main unit power does FBS PLC provides a special R4150 register which can delay the detection time of I O configuration The time base of R4150 is 0 01sec with a default value of 100 namely a 1se...

Page 48: ...nt 2 mA 1 5mA 0 9mA Maximum Input current 20mA 7mA 4 2 mA Input Status Indication Displayed by LED Lit when ON dark when OFF Isolation Type Photo coupler signal isolation SINK SRCE Wiring Independent Wiring Via variation of internal common terminal S S and external common wiring FBS 20MN X0 1 X2 11 FBS 32MN X0 1 4 5 X2 X3 X6 15 X16 19 FBS 44MN X0 1 4 5 8 9 1 2 13 X2 3 6 7 10 11 14 15 X16 27 FBS 10...

Page 49: ...5VDC single end SINK or SRCE input or to the 24VDC single end SINK or SRCE input by connecting a 3KΩ 0 5W resistor in series as shown in the figure below A Wiring of 5VDC differential input for Line Driver driving with frequency up to 920KHz for high speed and environments with large noise 雙絞線 A B 編碼器 FBS PLC B Wiring of 5VDC differential input to 5VDC single SINK or SRCE input 100KHz SRCE input P...

Page 50: ... the input terminals X0 X1 X2 etc of PLC Then finish it by connecting the external common wiring and internal common terminal S S to the positive negative terminals of the 24VDC power When connect the internal common terminal S S to 24V positive and the external common wire to 24V negative then the circuit serve as SINK input On the contrary while exchange the wiring of the above internal and exte...

Page 51: ... Y5 Y6 Y7 Y8 Y9 Y5 AC100 240V C0 C4 Y3 C2 Y0 Y1 Y4 Y2 Y7 C6 Y9 Y6 Y8 Y5 AC100 240V C0 Y0 Y1 C2 Y4 Y3 Y2 C4 Y8 Y6 C6 Y7 Y9 繼電器或閘流體之標示 空白無任何標示 電晶體SRCE輸出之標示 電晶體SINK輸出之標示 SINK SRCE SINK SRCE SINK SRCE IN IN IN 7 1 Specifications of Digital Output Circuit Warning No over current protection is available in the FBS series PLC Except for the 5V differential output circuit all other output circuits have to...

Page 52: ...Output Type Independent Dual Terminals for arbitrary connection Choose SINK SRCE by models and non exchangeable Bilateral device can be arbitrarily set to SINK SRCE output FBS 20MN T S Y0 1 Y2 7 Y2 7 Y2 7 FBS 32MN T S Y0 3 Y4 7 Y8 11 Y4 11 Y4 11 FBS 44MN T S Y0 7 Y8 15 Y8 15 Y8 15 FBS 10MC T S Y0 2 Y1 3 FBS 14MC T S Y0 2 Y1 3 5 FBS 20MC T S Y0 2 Y1 3 7 FBS 24MC T S Y0 2 Y1 3 7 Y8 9 FBS 32MC T S Y0...

Page 53: ...common point Combination of any output common with its individual single end outputs are called a Common Output Block which is available in 2 4 and 8PTs high density module in FBS PLC Each Common Output Block is separated from one another The common terminal has a label initiated with letter C while its numbering is determined by the minimum Yn number which comprise the output block In the example...

Page 54: ...e and Wiring of Single End Transistor SINK and SRCE Output Circuit A Transistor Single End SINK Output 1A FUSE 2A FUSE 共點輸出區塊 共點輸出區塊 FBS PLC C2 Y2 Y3 C4 Y4 Y5 Y6 Y7 Contact Current A Times of Action ten thousand AC DC power 2PTs Common Output Block 4PTs Common Output Block 4A FUSE 4A FUSE AC DC power ...

Page 55: ...Structure and Wiring of Single End TRIAC Output Circuit AC 電源 AC 電源 z TRIAC output can only be used for AC load Furthermore a load current larger than the holding current 25mA is required to keep TRIAC conducting Therefore when the load current is less than 25mA a Dummy load must be connected parallel with load to make the load current larger than the TRIAC holding current Besides note that even w...

Page 56: ...mponents The effect of surge currents or counter electromotive force voltages is particularly serious when heavy capacitive or inductive loads are incorporated which may cause damage to the output components or generate noises in other electronic circuits and equipment Among those three FBS PLC output components where TRIAC require no special treatment because of their features of smaller rated cu...

Page 57: ...ference The schematic diagrams for AC and DC powers are shown below respectively R 100 120Ω C 0 1 0 24uF PLC Relay output R Inductive load R C Scheme of AC power load R D 1N4001 diode or equivalent device PLC Relay output Inductive load VDC D Suppress by a diode in DC power load for low power R PLC Relay output Inductive load VDC ZD D D 1N4001 diode or equivalent device ZD 9V Zener 5W Suppress by ...

Page 58: ...f high power or frequent ON OFF please construct another suppression circuit to lower noise interference and prevent voltage from exceeding the limit or overheating that may damage the transistor output circuit D 1N4001 diode or equivalent device PLC Relay output Inductive load VDC D Suppress by a diode for low power D 1N4001 diode or equivalent device ZD 9V Zener 5W PLC Relay output Inductive loa...

Page 59: ...o the output circuit 8 2 Test Run and Monitoring The FBS PLC provides a convenient feature to Disable Enable the I O points by whole or individually Namely while PLC performs the normal logic scan operation and I O refreshment it does not update the status of the disabled input points according to the actual external input For the disabled output points the result of logic scan can t override the ...

Page 60: ... make PLC enter into Run state or switch from RUN to STOP state it has to be done through the programmer FP 07C or WINPROLADDER Once PLC is set to RUN or STOP it will keep that state even after power off The only exception is when using the ROM PACK no matter if it s running or stopped before power off PLC will automatically enter RUN state with correct ROM PACK syntax check when power is back In ...

Page 61: ...r lighting duration is proportional to the reception or transmission time The more received transmitted data or the slower bps reception transmission the longer the reception transmission time and so is the indication time brighter visually If in high speed but small amount of data only short and dim brightness is observed Therefore the communication condition can be easily distinguished by these ...

Page 62: ...sed battery Every FBs PLC main units have inside one re chargeable lithium battery to safely maintain program and data during main power shut down Each lithium battery was fully charged when the FBs PLC ship out from the factory capable to retain program and data at least 6 months There is risk to miss program and data when battery exhaust over 6 months the users should mind the date marked on eac...

Page 63: ...dder Diagram such as differential contact retentive coil refer to page 1 6 and other instructions that a conventional system cannot provide became available The basic operation principle for both conventional and PLC Ladder Diagram is the same The main difference between the two systems is that the appearance of the symbols for conventional Ladder Diagram are more closer to the real devices while ...

Page 64: ... condition the switch contact is at ON state and the light is on If the switch is pressed the contact status turns OFF and the light also turns off Circuit 3 contains more than one input element Output Y2 light will turn on under the condition when X2 is closed or X3 switches to ON and X4 must switch ON too 1 1 2 Sequential Logic The sequential logic is a circuit with feedback control that is the ...

Page 65: ... Sequencer In this section we only use the A B contacts and output coils as the example For more details on sequential instructions please refer to chapter 5 Introduction to Sequential Instructions 1 2 Differences Between Conventional and PLC Ladder Diagram Although the basic operation principle for both conventional and PLC Ladder Diagram are the same but in reality PLC uses the CPU to emulate th...

Page 66: ...Reverse flow characteristic As shown in the diagram below if X0 X1 X4 and X6 are ON and the remaining elements are OFF In a conventional Ladder Diagram circuit a reverse flow route for output Y0 can be defined by the dashed line and Y0 will be ON While for PLC Y0 is OFF because the PLC Ladder Diagram scans from left to right if X3 is off then CPU believes node a is OFF although X4 and node b are a...

Page 67: ...nt with open or short status One kind of contact is called Input contact reference number prefix with X and its status reference from the external signals the input signal comes from the input terminal block Another one is called Relay contact and its status reflects the status of relay coil please refer to d The relation between the reference number and the contact status depends on the contact t...

Page 68: ...sic unit of a Ladder Diagram An element consists of two parts as shown in the diagram below One is the element symbol which is called OP Code and another is the reference number part which is called Operand Operand X100 Y15 OP Code Element type Symbol Mnemonic instructions Remark A Contact Normally OPEN ORG LD AND OR B Contact Normally CLOSE ORG LD AND OR NOT can be X Y M S T C please refer to sec...

Page 69: ... mnemonic entry it is necessary to break down the circuits into element serial and parallel blocks Please refer to section 1 5 i Branch In any network branch is obtained if the right side of a vertical line is connected with two or more rows of circuits Example Branch Merge line is defined as another vertical line at the right side of a branch line that merges the branch circuits into a closed cir...

Page 70: ...iagram into mnemonic instructions by themselves Since FPC 07 only can input program with mnemonic instruction this section till section 1 6 will furnish you with the coding rules to translate ladder diagrams into mnemonic instructions z The program editing directions are from left to right and from top to bottom Therefore the beginning point of the network must be at the upper left corner of the n...

Page 71: ...ion of a single element ORG X 0 OR X 1 AND X 2 Example X0 X2 X1 Ö ORG X 0 AND X 1 OR X 2 Example X0 X1 X3 X2 Ö AND X 3 z If the parallel element is a serial block ORLD instruction must be used ORG X 2 LD X 0 AND X 1 ORLD Example X3 X2 X1 X0 Ö AND X 3 Remark If more than two blocks are to be connected in parallel they should be connected in a top to bottom sequence For example block 1 and block 2 s...

Page 72: ...1 X3 X2 X4 Serial Block Must use ANDLD instruction Ö Remark If there are more than two blocks are to be connected serially they should be connected in a top to bottom sequence For example block 1 and 2 should be connected first then connect block 3 to it and so on ORG X 0 LD X 1 OR X 2 ANDLD LD X 3 AND X 4 LD X 5 AND X 6 ORLD OR X 7 ANDLD Example X6 X5 X2 X0 X1 X3 X7 X4 Ö z The output coil instruc...

Page 73: ...ttom to form a parallel or a serial parallel blocks and finally to form a complete network Sample diagram 8 6 4 5 13 9 7 3 1 2 14 10 12 11 9 7 8 1 3 6 2 4 5 10 11 ANDLD AND ANDLD ORLD X0 X1 X2 X3 ORLD X4 X5 X6 X7 X8 X9 X11 X10 Y0 OR 12 ORG AND X0 X1 Serial blockc LD AND X2 X3 Serial blockd e ORLD Forming the parallel block e i LD AND X4 X5 Serial blockf LD AND X6 X7 Serial blockg h k ORLD Forming ...

Page 74: ... the blocks Example Merge line Branch line Remark 1 The OUT TR instruction must be programmed at the top of the branched point LD TRn instruction is used at the starting point of the circuits after second rows of the branch line for regaining the branch line status before you can connect any element to the circuits AND instruction must be used to connect the first element after OUT TRn or LD TRn i...

Page 75: ... LD TR1 block 3 Ö OUT Y 0 z The above sample diagram shows a typical example of connecting two parallel blocks in series Block 3 is formed when the element X9 is introduced into the network and the two parallel blocks become the branched blocks z TR instruction is not necessary because the point is the origin line z If have already used TR relay to connect two blocks serially then ANDLD instructio...

Page 76: ...ch node of a branch circuit is directly connected to the output coil this coil could be located on top of the branch line first row to reduce the code Y0 Y1 X0 Ö X0 Y0 Y1 OUT TR 0 OUT Y 1 AND X 0 AND X 0 OUT Y 0 OUT Y 0 LD TR 0 OUT Y 1 z The diagram shown below indicates the TR relay and the ORLD instruction can be omitted X0 Y0 Y1 OUT TR0 X1 X2 X3 Ö Y0 X0 Y1 X1 X2 X1 X3 ORG X 0 ORG X 1 LD X 1 AND...

Page 77: ...1 15 z Conversion of the bridge circuit X0 Y0 Y1 X1 X2 This network structure is not allowed in PLC program Ö X1 Y0 Y1 X0 X2 X2 X1 X0 ORG X 1 AND X 2 OR X 0 OUT Y 0 ORG X 0 AND X 2 OR X 1 OUT Y 1 ...

Page 78: ...MEMO ...

Page 79: ... R3840 R4167 R5000 F0 F8191 DOC 8KW ROR 3KW LADDER PROGRAM 20KW LABEL 1KW R3839 Y255 Y255 2 1 FBS PLC Memory Allocation Remark 1 When the Read Only Register ROR has been configured by the user the contents of R5000 R8071 depends on the quantity of configuration will be loaded from the ROR s during each time of power up or changing from STOP to RUN mode The user can access the ROR through the corre...

Page 80: ... Non Retentivee C140 C199 60 Configurable as Retentive Retentive C200 C239 40 Configurable as Non retentive CTR CV of Counter Register 32 bit Non Retentive C240 C255 16 Configurable as Retentive Retentive R0 R2999 3000 D0 D3999 4000 DR or HR Data Registers Non Retentive R3000 R3839 840 R0 R3839 configurable as Non retentive or Retentive D0 D3999 are fixed to Retentive IR Input Registers R3840 R390...

Page 81: ...ring power up or changing operation mode from STOP RUN While testing it may disable and force ON M2001 to keep the ON OFF state of disabled contacts but don t forget to enable the M2001 after testing 2 CLEAR Control M1914 Clear Non Retentive Relays y Cleared When at 1 M1915 Clear Retentive Relays y Cleared When at 1 M1916 Clear Non Retentive Registers y Cleared When at 1 M1917 Clear Retentive Regi...

Page 82: ...the modem is ready 4 Error Messages M1928 Reserved M1929 Reserved M1930 No expansion unit or exceed the limit on number of I O points y 1 Indicating no expansion unit or exceed the limit on number of I O points M1931 Immediate I O not in the main unit range y 1 Indicating that Immediate I O not in the main unit range and the main unit cannot RUN M1932 Unused M1933 System stack error y 1 Indicating...

Page 83: ...col M1957 The CV value control after the timer Time Up y 0 The CV value will continue timing until the upper limit is met after Time Up y 1 The CV value will stop at the PV value after Time Up User may control M1957 within the program to control the individual timer M1958 Communication port 2 High Speed Link mode selection y 0 Set Port 2 to Normal Speed Link y 1 Set Port 2 to High Speed CPU Link M...

Page 84: ...y 0 Indicating that the CV value will continue counting up to the upper limit after Time Up y 1 Indicating that the CV value will stop at the PV value after Count Up User may control M1973 within the program to control the individual counter M1974 RAMP function FUN95 slope control y 0 Time control for ramping y 1 Equivalent slope control for ramping M1975 CAM function FUN112 selection y 1 For the ...

Page 85: ...eady M1994 PSO2 Busy indicator y 0 PSO2 Busy y 1 PSO2 Ready M1995 PSO3 Busy indicator y 0 PSO3 Busy y 1 PSO3 Ready M1996 PSO0 Finished indicator y 1 PSO0 finished the last step of motion M1997 PSO1 Finished indicator y 1 PSO1 finished the last step of motion M1998 PSO2 Finished indicator y 1 PSO2 finished the last step of motion M1999 PSO3 Finished indicator y 1 PSO3 finished the last step of moti...

Page 86: ...R4005 High Byte Period of PWM 0 2 seconds 1 4 seconds 2 8 seconds 3 1 second 4 16 seconds 5 32 seconds Low Byte Period of PID calculation 0 2 seconds 1 4 seconds 2 8 seconds 3 1 second 4 16 seconds 5 32 seconds For PID temperature control R4006 Threshold value of output ratio for heating cooling loop abnormal detecting Unit in For PID temperature control R4007 Threshold value of continuous time fo...

Page 87: ...into or from ROM Pack When the ROM Pack being used to save the ladder program and data registers these tables describes which registers will be written into the ROM Pack The addressed registers will be initialized from ROM Pack while power up R4040 Reply delay time settings for Port 0 and Port 1 Low Byte For Port 0 Unit in mS High Byte For Port 1 Unit in mS R4041 Reply delay time settings for Port...

Page 88: ...te I O over the CPU limitation 7 Syntax not OK 8 Qty of expansion I O modules exceeds 9 Qty of expansion I O points exceeds 10 CRC error of system FLASH ROM R4050 Port 0 Communication Parameters Register Set Baud Rate of Port 0 R4051 Reserved R4052 Indicator while writing ROM Pack R4053 Reserved R4054 Define the master station number of the High Speed CPU Link network FUN151 Mode 3 If the master s...

Page 89: ...error 9 Parameter 8 error 10 Parameter 9 error 30 Speed setting reference number error 31 Speed value error 32 Stroke setting reference number error 33 Stroke value error 34 Illegal positioning program 35 Step over 36 Step number exceeds 255 37 Highest frequency error 38 Idle frequency error 39 Movement compensation value too large 40 Movement value exceeds range 41 DRVC instruction not allow ABS ...

Page 90: ... Word of PSO 3 R4080 Low Word of PSO 0 R4081 High Word of PSO 0 R4082 Low Word of PSO 1 R4083 R4084 Current output frequency High Word of PSO 1 Low Word of PSO 2 R4085 High Word of PSO 2 R4086 R4087 Low Word of PSO 3 High Word of PSO 3 R4088 Low Word of PSO 0 R4089 High Word of PSO 0 R4090 Low Word of PSO 1 R4091 R4092 Current pulse position High Word of PSO 1 Low Word of PSO 2 R4093 R4094 High Wo...

Page 91: ... HSC3 preset value Low Word HSC3 preset value High Word HSC4 current value Low Word HSC4 current value High Word HSC4 preset value Low Word HSC4 preset value High Word HSC5 current value Low Word HSC5 current value High Word HSC5 preset value Low Word HSC5 preset value High Word HSC6 current value Low Word HSC6 current value High Word HSC6 preset value Low Word HSC6 preset value High Word HSC7 cur...

Page 92: ...ith ROM Pack Bit4 1 Watch Dog error Bit5 1 MA model main unit Bit6 1 With ID protection Bit7 1 Emergency stop Bit8 1 Immediate I O over range Bit9 1 System STACK error Bit10 1 ASIC failed Bit11 1 Function not allowed Bit12 Reserved Bit13 1 With communication board Bit14 1 With calendar Bit15 1 MC main unit R4140 R4141 R4142 R4143 R4144 R4145 Telephone Number ...

Page 93: ...n time interval to identify the different packet High byte of R4148 is used for this setting for Port 1 Port 4 Unit in mS R4149 Modem Interface Setting Port0 without checking of station number for FATEK s external communication protocol y High Byte of R4149 55H Remote Diagnosis Remote CPU Link by way of Port 1 through Modem connection it supports user program controlled dial up function AAH Remote...

Page 94: ...hout station number checking for FATEK s external communication protocol communicating with MMI SCADA Others Port 4 checks station number it allows multi drop network for data acquisition R4157 System used R4158 Port 2 Communication Parameters Register Not for High Speed CPU Link Set Baud Rate Data bit of Port 2 R4159 Transmission Delay Receive Time out interval time Setting while Port 2 being use...

Page 95: ...ialing 4 Wait the dialing tone and detect the busy tone when dialing Any other value treated as value equal 4 y High Byte of R4163 The Ring count setting for Modem auto answer R4164 V index register R4165 Z index register R4166 System used R4167 Model of main unit y Low Byte of R4167 0 6I 4O FBs 10xx 1 8I 6O FBs 14xx 2 12I 8O FBs 20xx 3 14I 10O FBs 24xx 4 20I 12O FBs 32xx 5 24I 16O FBs 40xx 6 36I ...

Page 96: ...sor R4044 must be 56XFH Port 4 user defined Baud Rate 1125 1152000 bps D4003 18432000 Baud Rate 1 D4004 D4079 Reserved D4080 D4081 D4082 D4083 D4084 D4085 D4086 D4087 D4088 D4089 P0 index register P1 index register P2 index register P3 index register P4 index register P5 index register P6 index register P7 index register P8 index register P9 index register D4090 D4095 Reserved Remark All the speci...

Page 97: ...n contact 0 54uS LD OPEN Starting a relay circuit from origin or branch line with a open circuit contact LD SHORT Starting a relay circuit from origin or branch line with a short circuit contact 0 33uS Origin or branch line starting instructions AND Serial connection of normally open contact AND NOT Serial connection of normally closed contact 0 33uS AND TU Serial connection of differential up con...

Page 98: ...trols up to 4 inputs which can have up to 8 different types of operation mode combinations Hence the size of FBs PLC instruction sets is in fact not smaller than that of a large PLC Having powerful instruction functions though may help for establishing the complicated control applications but also may impose a heavy burden on those users of small type PLC s For ease of use FATEK PLC function instr...

Page 99: ...ore the result to D 12 Sa Sb D DP Perform subtraction of Sa and Sb and then store the result to D 13 Sa Sb D DP Perform multiplication of Sa and Sb and then store the result to D 14 Sa Sb D DP Perform division of Sa and Sb and then store the result to D 15 1 D DP Adds 1 to the D value 16 1 D DP Subtracts 1 from the D value 23 DIV48 Sa Sb D P Perform 48 bits division of Sa and Sb and then store the...

Page 100: ...S trigonometric function 211 FTAN S D D TAN trigonometric function 212 FNEG D P Change sign of floating point number 213 FABS D P Take absolute value of floating point number Logical Operation Instructions 18 AND Sa Sb D DP Perform logical AND for Sa and Sb and store the result to D 19 OR Sa Sb D DP Perform logical OR for Sa and Sb and store the result to D 35 XOR Sa Sb D DP Take the result of the...

Page 101: ... sequentially then store in D 48 DIST S N D P De compose the word into successive N nibbles starting from nibble 0 of S and store them in the NB0 of the successive N words starting from D 49 BUNIT S N D P Low byte of words re unit 50 BDIST S N D P Words split into multi byte 160 RW FR Sa Sb Pr L DP File register access Shifting Rotating Instructions 6 BSHF D DP Shift left or right 1 bit of D regis...

Page 102: ...data of S into time data hours minutes seconds and store the data in the three successive registers starting from D 63 HEX S N D P Convert the successive N ASCII data starting from S into hexadecimal data and store them to D 64 ASCⅡ S N D P Convert the successive N hexadecimal data starting from S into ASCII codes and store them to D Flow Control Instructions 0 MC N The start of master control loo...

Page 103: ...n Sv Os PR IR DR OR WR PID Temperature control 139 HSPWM PW OP RS PN OR WR Hardware PWM pulse output Cumulative Timer Function Instructions 87 T 01S CV PV Cumulative timer using 0 01S as the time base 88 T 1S CV PV Cumulative timer using 0 1S as the time base 89 T1S CV PV Cumulative timer using 1S as the time base Watch Dog Timer Control Function Instructions 90 WDT N P Set the WDT timer time out ...

Page 104: ... Td with Rs 108 T_SHF IW Ts Td L OW DP Store the result into Td after shift left or right one entry of table Ts The shift out data is send to OW and the shift in data is from IW 109 T_ROT Ts Td L DP Store the result into Td after shift left or right one entry of table Ts 110 QUEUE IW QU L Pr OW DP Push IW into QUEUE or get the data from the QUEUE to OW FIFO 111 STACK IW ST L Pr OW DP Push IW into ...

Page 105: ...bit of the Ms Rotated out bit will appear at OTB 130 MBCNT Ms L D P Calculate the total number of bits that are 0 or 1 in Ms then store the results into D NC Positioning Instruction 140 HSPSO Ps SR WR HSPSO instruction of NC positioning control 141 MPARA Ps SR P Parameter setting instruction of NC positioning control 142 PSOFF Ps P Stop the pulse output of NC positioning control 143 PSCNV Ps D P C...

Page 106: ...pplying those instructions In this chapter we only introduce the applicable operands ranges and element characteristics functionality 4 1 Valid Operand of Sequential Instructions X Y M SM S T C TR OPEN SHORT Operand Ranges Instruction X0 X255 Y0 Y255 M0 M1911 M1912 M2001 S0 S999 T0 T255 C0 C255 TR0 TR39 ORG ORG NOT ORG TU ORG TD LD LD NOT LD TU LD TD AND AND NOT AND TU AND TD OR OR NOT OR TU OR TD...

Page 107: ...time TU and TD contact will work normally as described above if the change of the status of the valid referenced operands listed in the Valid Range of the Operand of Sequential instructions table are not driven by the function instructions Remark For TU TD elements which operand is of relay will turn on after the first time the corresponding relay get driven from 0 to 1 1 to 0 When the next time t...

Page 108: ...e descriptions of FUN4 DIFU and FUN5 DIFD instructions at chapter 7 4 2 2 OPEN and SHORT Contact The status of OPEN and SHORT contact are fixed and can t be changed by any ladder instructions Those two contacts are mainly used in the places of the Ladder Diagram where fixed contact statuses are required such as the place where the input of an application instruction is used to select the mode The ...

Page 109: ...ement status of node status into an operand specified by the coil instruction The characteristics depicts at below ORG X 0 OUT Y 0 Y0 Y1 X0 OUT NOT Y 1 X0 Y0 Y1 4 2 4 Retentive Output Coil The coil element can be categorized into two types namely Retentive and Non Retentive For example M0 M799 can be specified as the Retentive coils and M800 M1399 can be specified as the Non Retentive coils One wa...

Page 110: ...epicts at below ORG X 0 SET P Y 0 P SET Y 0 X0 X1 EN P RST Y 0 EN ORG RST P X Y 1 0 X0 X1 Y0 SET RST 4 3 Node Operation Instructions A node is the connection between elements in a ladder diagram consisting of sequential instruction elements please refer to Section 1 2 There are four instructions dedicated for node status operation in FBs PLC The two instructions OUT TR and LD TR have been discusse...

Page 111: ...4 6 X0 X1 Node A Y0 Y1 Node B differential down Incerse differential up t Scan time Inverse t t ...

Page 112: ... PLC function instructions can be ranged from one to four Execution of the instructions and operations is dependent on the input control signal or the combinations of the several input control signals The ladder programming software for FACON PLC Winprollader can help user to complete the complex design and document works In the ladder program window we can see all the function instructions were d...

Page 113: ...unction instructions must be entered using the instruction number Follow the instruction number there are postfixes D P DP can be added which can derive three additional function instructions D Indicates a Double Word 32 bit The 16 bit word is the basic unit of the registers in FBs PLC The data length of R T and C except C200 C255 registers are 16 bit If a register with 32 bit data length is requi...

Page 114: ...pulse input is indicated by a symbol such as CK EN TG etc In this operation manual an example of the operation statement of a function instruction is shown below When the operation control EN 1 or EN P instruction from 0 1 The first one indicates the execution requirement for non P instruction level mode and the second one indicates the execution requirement for P instruction pulse mode The follow...

Page 115: ...cutive registers forms a matrix The basic operation unit is bit If there is more than one matrix each matrix will be identified by footnotes such as Ma Mb Ms and Md etc Besides the major operands mentioned above there are other operands which are used for certain special purposes such as the operand Fr for frequency ST for stack QU for Queue etc Please refer to the instruction descriptions for mor...

Page 116: ...ate the systems and make debugging more difficult Therefore you should avoid writing anything into the TMR or CTR registers Remark 4 T0 T255 and C0 C199 are 16 bit register But C200 C255 are 32 bit register therefore can t be used as 16 bit operands Remark 5 Apart from being directly appointed by register s number address as the foregoing discussions the register s operand in the range of R0 R8071...

Page 117: ...ll keep the same status until a new FO status is generated after the instruction is executed again memory keeping When M1919 1 the FO status will be reset to 0 no memory keeping if the instruction is not executed 5 2 Use Index Register XR for Indirect Addressing In the FBs PLC function instructions there are some operands that can be combined with pointer register V Z P0 P9 to make indirect addres...

Page 118: ... Rxxxx register the instruction format is RPn n 0 9 or RPmPn m n 0 9 for example RP5 where P5 100 it means R100 or RP0P1 where P0 100 P1 50 it means150 When P0 P9 index register being combined with the Dxxxx register the instruction format is DPn n 0 9 or DPmPn m n 0 9 for example DP3 where P3 10 it means D10 or DP4P5 where P4 100 P5 1 it means D101 It can combine both P0 P9 index register for exa...

Page 119: ...agement system for community residents Each resident has a set of basic information including name telephone number number plate and parking number that occupy four consecutive PLC registers as shown in the above diagram A total of 400 registers R100 R499 are occupied Each resident is given a card with a unique card number the number is 0 for resident 1 4 for resident 2 etc for the sensing pass of...

Page 120: ...he basic numbering system of digital computer Since the PLC operates with discrete ON OFF values it is natural to use binary codes The following terminologies should be fully understood before go to further topic of numbering system Bit Abbreviated as B such as B0 B1 and so on It is the most basic unit of binary value The status of bit is either 1 or 0 Nibble Abbreviated as NB such as NB0 NB1 and ...

Page 121: ...ting is N 1 S 2 E 127 1 M 0 E 255 For example 1 1 1 0 2 01111111 1 000 0 The sign is represented by 0 the exponent s code in excess 127 is 127 01111111 and the significant bit is 1 resulting in the mantissa being all O s The simple precision IEEE 754 representation of 1 is thus 3F800000H 2 0 5 1 0 2 01111110 1 000 0 The sign is represented by 0 the exponent s code in excess 127 is 127 1 01111110 a...

Page 122: ... PLC The ranges of the three numeric values are shown below 16 bit 32768 32767 32 bit 2147483648 2147483647 Floating point number 1 8 10 38 3 4 10 38 5 3 4 Representation of Numeric Value Beginners can skip this section The representation and specification of 16 bit and 32 bit numeric values are provided below to enable the user to further understand the numeric value operation for more complicate...

Page 123: ...s section The maximum positive value that can be represented by 16 bit and 32 bit operands are 32767 and 2147483647 respectively While the minimum negative values that can be represented by 16 bit and 32 bit operands are 32768 and 2147483648 respectively When increase or decrease an operand e g when Up Down Count of a counter or the register value is 1 or 1 and the result exceeds the value of the ...

Page 124: ...ce are the same either 16 bit or 32 bit the result of addition subtraction may cause the value of sum difference to exceed 16 bit or 32 bit Therefore it is necessary to use carry borrow flag to be in coordination with the sum difference operand to represent the actual value The carry flag is set when the addition subtraction result exceeds the positive limit 32767 or 2147483647 of the sum differen...

Page 125: ... 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32768 C 0 B 0 Z 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 32767 C 0 B 0 Z 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 32766 C 0 B 0 Z 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 32765 x x x x x x x x x x C 0 B 0 Z 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2 C 0 B 0 Z 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 C 0 B 0 Z 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Positive Value C 0 B 0 Z 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ...

Page 126: ...T 6 8 RST 6 10 0 MC 6 12 1 MCE 6 14 2 SKP 6 15 3 SKPE 6 17 4 DIFU 6 18 5 DIFD 6 19 6 BSHF 6 20 7 UDCTR 6 21 8 MOV 6 23 9 MOV 6 24 10 TOGG 6 25 11 6 26 12 6 27 13 6 28 14 6 30 15 1 6 32 16 1 6 33 17 CMP 6 34 18 AND 6 35 19 OR 6 36 20 B C D 6 37 21 B I N 6 38 ...

Page 127: ...nge the register content to change the timer s time Please refer to Example 2 The maximum error of a timer is a time base plus a scan time In order to reduce the timing error in the application please use the timer with a smaller time base Description When the time control EN is 1 the timer will start timing the current value will accumulate from 0 until Time Up i e CV PV then the Tn contact and T...

Page 128: ... 67S Example 2 Variable PV The preset value PV shown in example 1 is a constant which is equal to 1000 This value is fixed and can not be changed once programmed In many circumstances the preset time of the timers needs to be varied while PLC running In order to change the preset time of a timer can first use a register as the PV operand R or WX WY and then the preset time can be varied by changin...

Page 129: ... T 50 PV R 0 ORG T 50 OUT Y 0 c d X1 T50 When R0 100 When R0 200 Time Start Time Up Time Up current value 10 0S 20 0S Y0 Y0 0 100 200 Remark If the preset value of the timer is equal to 0 then the timer s contact status and FO0 TUP become 1 EN input must be at 1 immediately after the PLC finishes its first scan because Time Up has occurred TUP stays at 1 until EN input changes to 0 c d ...

Page 130: ...ting frequency with this instruction can only up to 20Hz for higher frequency please use the high speed soft hardware counter Description When CLR is at 1 all of the contact Cn FO0 CUP and CV value of the counter CV are cleared to 0 and the counter stops counting When CLR is at 0 the counter is allowed to count up The Counter counts up every time the clock CK changes from 0 to 1 adds 1 to the CV u...

Page 131: ...973 ORG X 0 LD X 1 C 2 PV 5 c M1973 0 Defaulted d M1973 1 Count Start Count Up X0 X1 C1 Y1 C2 C2 CV 0 0 1 2 3 4 5 6 1 2 3 4 32766 32767 0 0 5 5 times 32767 times Example 2 32 Bit counter with variable preset value Like a timer if the PV of a counter is changed to a register such as R D and so on the counter will use the register contents as the counting PV Therefore only need to change the registe...

Page 132: ...LD X 1 C200 PV R 0 ORG C 200 OUT Y 1 c d X0 X1 C200 R1 0 When R0 4 When R0 9 Y1 Y1 Count Start Count Up 4 times 9 times Count Up 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Remark If the preset value of the counter is 0 and CLR input also at 0 then the Cn contact status and FO0 CUP becomes 1 immediately after the PLC finishes its first scan because the Count Up has occurred It will stay at 1 regardless how...

Page 133: ... Y255 M0 M1911 M1912 M2001 S0 S999 WY0 WY240 WM0 WM1896 WS0 WS984 T0 T255 C0 C255 R0 R3839 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 D Description When the set control EN 1 or EN P instruction is from 0 to 1 sets the bit of a coil or all bits of a register to 1 Example 1 Single Coil Set Ladder Diagram Key Operations Mnemonic Codes X1 X0 EN EN P P SET RST Y 0 Y 0 ORG ORG ORG SET P ORG RST P X Y ...

Page 134: ... ORG ORG SET P X R 0 0 B15 B0 D R0 1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 0 ØX0 B15 B0 D R0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Example 3 32 Bit Register Set Ladder Diagram Key Operations Mnemonic Codes SET R 0 X0 EN D ORG ORG SET D X R 0 0 B31 R1 R0 B0 D R0 1 0 1 1 0 1 1 0 1 0 1 1 1 0 1 1 1 1 1 1 0 1 0 1 1 0 1 1 0 0 0 1 ØX0 1 D R0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ...

Page 135: ...1 M1912 M2001 S0 S999 WY0 WY240 WM0 WM1896 WS0 WS984 T0 T255 C0 C255 R0 R3839 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 D Description When the reset control EN 1 or EN P instruction from 0 to 1 resets the coil or register to 0 Example 1 Single Coil Reset Please refer to example 1 for the SET instruction shown in page 6 8 Example 2 16 Bit Register Reset Ladder Diagram Key Operations Mnemonic Cod...

Page 136: ... B0 D R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Example 3 32 Bit Register Reset Ladder Diagram Key Operations Mnemonic Codes D X0 EN RST WM1368 ORG ORG X 0 RST D WM1368 M1399 WM1384 WM1368 M1368 D WM1368 0 1 1 0 1 1 1 0 0 0 0 0 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 ØX0 1 D WM1368 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ...

Page 137: ...er the MC N instruction When the Master Control input EN is 1 then this MC N instruction will not be executed as it does not exist When the Master Control input EN is 0 the master control loop is active the area between the MC N and MCE N is called the Master Control active loop area All the status of OUT coils or Timers within Master Control active loop area will be cleared to 0 Other instruction...

Page 138: ...ges from 0 1 the pulse type function instructions will not be executed again When M1918 1 and the master control input changes from 0 1 and if pulse type function instructions exist in the master control loop then each time the master control input changes from 0 1 the pulse type function instructions in the master control loop will be executed as long as the action conditions are satisfied When a...

Page 139: ...will be cleared to 0 and no other instructions will be executed The program execution will resume until a MCE instruction which has the same N number as MC N instruction appears MCE instruction does not require an input control because the instruction itself forms a network which other instructions can not connect to it If the MC instruction has been executed then the master control operation will...

Page 140: ...truction When the skip control EN is 0 then the Skip Start instruction will not be executed When the skip control EN is 1 the range between the SKP N and SKPE N which is so called the Skip active loop area will be skipped that is all the instructions in this area will not be executed Therefore the statuses of the discrete or registers in this Skip active loop area will be retained Example Ladder D...

Page 141: ...Basic Function Instruction 6 16 FUN 2 SKP SKIP START FUN 2 SKP Y2 Y1 Y0 T201 10S X0 X1 X2 0 10 0 ...

Page 142: ...ause the instruction itself forms a network which other instructions can not connect to it If the SKP N instruction has been executed then the skip operation will be completed when the execution of the program reaches the SKPE N instruction If SKP N instruction has never been executed then the SKPE instruction will do nothing Example Please refer to the example and explanations for SKP N instructi...

Page 143: ...erentiation of a node status status input to TG and the pulse signal resulting from the status change at the rising edge of the TG for one scan time is stored to a coil specified by D The functionality of this instruction can also be achieved by using a TU contact Example The results of the following two samples are exactly the same Ladder Diagram Key Operations Mnemonic Codes Example 1 X1 TG 4 DI...

Page 144: ...fferentiation of a node status status input to TG and the pulse signal resulting from the status change at the falling edge of the TG for one scan time is stored to a coil specified by D The functionality of this instruction can also be achieved by using a TD contact Example The results of the following two samples are exactly the same Ladder Diagram Key Operations Mnemonic Codes Example 1 Y 0 X1 ...

Page 145: ...EN 1 or EN P instruction from 0 to 1 the data of the register will be shifted to right L R 0 or to left L R 1 by one bit The shifted out bit MSB when shift to left and LSB when shift to right for both cases will be sent to FO0 The vacated bit space LSB when shift to left and MSB when shift to right due to shift operation will be filled in by the input status of fill in bit INB Example Shifts the 1...

Page 146: ...1 If there are more clocks input the counter will continue counting which cause CV PV Then FO0 will immediately change to 0 This means the Count Up signal will only be equal to 1 if CV PV or else it will be equal to 0 Care should be taken to this difference from the Count Up signal of the general counter The upper limit of up count value is 32767 16 bit or 2147483647 32 bit After the upper limit i...

Page 147: ... 2 3 2 1 0 1 2 3 4 Remark 1 Since the counting operation of UDCTR is implemented by software scanning therefore if the clock speed is faster than the scan speed lose count may then happen generally the clock should not exceed 20Hz depending on the size of the program Please use the software or hardware high speed counter in the PLC Refer to the High Speed Counter Application in the Advanced Manual...

Page 148: ...XR Range Ope rand WX0 WX240 WY0 WY240 WM0 WM1896 WS0 WS984 T0 T255 C0 C255 R0 R3839 R3840 R3903 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 16 32 bit number V Z P0 P9 S D Description Move write the data of S to a specified register D when the move control input EN 1 or EN P instruction from 0 to 1 Example Writes a constant data into a 16 bit register Ladder Diagram Key Operations Mnemonic Codes X...

Page 149: ... C255 R0 R3839 R3840 R3847 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 16 32 bit number V Z P0 P9 S D Description Inverts the data of S changes the status from 0 to 1 and from 1 to 0 and moves the results to a specified register D when the move control input EN 1 or EN P instruction from 0 to1 Example Moves the inverted data of a 16 bit register to another 16 bit register Ladder Diagram Key Opera...

Page 150: ...bol Operand D the coil number of the toggle switch Y M SM S Range Ope rand Y0 Y255 M0 M1911 M1912 M2001 S0 S999 D Description The coil D changes its status from 1 to 0 and from 0 to 1 each time the input TG is triggered from 0 to 1 rising edge Example Ladder Diagram Key Operations Mnemonic Codes Y 0 TG X0 10 TOGG ORG ORG X 0 FUN 10 D Y 0 X0 Y0 ...

Page 151: ...the data specified at Sa and Sb and writes the results to a specified register D when the add control input EN 1 or EN D instruction from 0 to 1 If the result of addition is equal to 0 then set FO0 to 1 If carry occurs the result exceeds 32767 or 2147483647 then set FO1 to 1 If borrow occurs adding negative numbers resulting in a sum less than 32768 or 2147483648 then set the FO2 to 1 All the FO s...

Page 152: ... a specified register D when the subtract control input EN 1 or EN P instruction from 0 to 1 If the result of subtraction is equal to 0 then set FO0 to 1 If carry occurs subtracting a negative number from a positive number and the result exceeds 32767 or 2147483647 then set FO1 to 1 If borrow occurs subtracting a positive number from a negative number and the resulted difference is less than 32768...

Page 153: ...0 R3839 R3840 R3903 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 16 32 bit number V Z P0 P9 Sa Sb D Description Performs the multiplication of the data specified at Sa and Sb and writes the results to a specified register D when the multiplication control input EN 1 or EN P instruction from 0 to 1 If the product of multiplication is equal to 0 then set FO0 to 1 If the product is a negative number ...

Page 154: ...ified at Sa and Sb and stores the result in D FUN 13 D P Example 2 32 bit multiplication Ladder Diagram Key Operations Mnemonic Codes X0 EN R R R 0 13P D 0 D 0 U S 2 4 Sa Sb D ORG ORG X 0 FUN 13D Sa R 0 Sb R 2 D R 4 R1 R0 Sa 12345678 Multiplicand Sb R3 R2 Multiplier R7 R6 R5 R4 D 5629629168 Product ...

Page 155: ...967 R3968 R4167 R5000 R8071 D0 D4095 16 32 bit number V Z P0 P9 Sa Sb D Description Performs the division of the data specified at Sa and Sb and writes the quotient and remainder to registers specified by register D when the division control input EN 1 or EN P instruction from 0 to 1 If the quotient of division is equal to 0 then set FO0 to 1 If the divisor Sb 0 then set the error flag FO1 to 1 wi...

Page 156: ...a and Sb and stores the result in D FUN 14 D P Example 2 32 bit division Ladder Diagram Key Operations Mnemonic Codes U S X0 EN 14P 0 2 4 R Sa Sb R ERR D 0 D R ORG ORG X 0 FUN 14D Sa R 0 Sb R 2 D R 4 R1 R0 Sa 2147483647 Dividend R3 R2 Sb 1234567 Divisor R7 R6 R5 R4 D 571634 1739 Remainder Quotient ...

Page 157: ...35 R4136 R4167 R5000 R8071 D0 D4095 V Z P 0 P 9 D Adds 1 to the register D when the increment control input EN 1 or EN P instruction from 0 to 1 If the value of D is already at the upper limit of positive number 32767 or 2147483647 adding one to this value will change it to the lower limit of negative number 32768 or 2147483648 At the same time the overflow flag FO0 OVF is set to 1 Example 16 bit ...

Page 158: ... R4135 R4136 R4167 R5000 R8071 D0 D4095 V Z P 0 P 9 D Description Subtracts 1 from the register D when the decrement control input EN 1 or EN P instruction from 0 to 1 If the value of D is already at the lower limit of negative number 32768 or 2147483648 subtracting one from this value will change it to the upper limit of positive number 32767 or 2147483647 At the same time the underflow flag FO0 ...

Page 159: ...data of Sa Sb then set FO1 to 1 If the data of Sa Sb then set FO2 to 1 If the data of Sa Sb then set the FO2 to 1 Example Compares the data of 16 bit register Ladder diagram Key operations Mnemonic code Sa Sb R R 1 a b EN X0 U S 17 CMP 0 a b a b Y0 OUT ORG ORG X 0 FUN 17 Sa R 0 Sb R 1 FO 2 OUT Y 0 From the above example we first assume the data of R0 is 1 and R1 is 2 and then compare the data by e...

Page 160: ...0 D4095 16 32 bit number Sa Sb D Performs logical AND operation for the data of Sa and Sb when the operation control input EN 1 or EN P instruction from 0 to 1 This operation compares the corresponding bits of Sa and Sb B0 B15 or B0 B31 The bit in the D is set to 1 if both of the corresponding bits data of Sa and Sb is 1 The bit in the D is set to 0 if one of the corresponding bits is 0 Example Op...

Page 161: ...6 32 bit number Sa Sb D Performs logical OR operation for the data of Sa and Sb when the operation control input EN 1 or EN P instruction from 0 to 1 This operation compares the corresponding bits of Sa and Sb B0 B15 or B0 B31 The bit in the D is set to 1 if one of the corresponding of Sa or Sb is 1 The bit in the D is set to 0 if both of the corresponding bits of Sa and Sb is 0 Example Operation ...

Page 162: ...cute calculations If want to send the internal PLC data to the external displays such as seven segment displays it is more convenient for us to read the result on screen by converting the BIN data to BCD data For example it is more clear for us to read the reading 12 instead of the binary code 1100 Converts BIN data of the device specified at S into BCD and writes the result in D when the operatio...

Page 163: ...order for PLC to accept the data which is originally in decimal unit BCD code inputted from external device such as digital switch because the BCD data can not be accepted by PLC for its operations Converts BCD data of the device specified at S into BIN and writes the result in D when the operation control input EN 1 or EN P instruction from 0 to 1 If the data in S is not in BCD then the error fla...

Page 164: ...ctions FUN74 8 6 7 55 7 72 Cumulative timer instructions FUN87 8 9 7 73 7 74 Watchdog timer instructions FUN90 9 1 7 75 7 76 High speed counting timing FUN92 9 3 7 77 7 78 Report printing instructions FUN94 7 79 7 80 Slow up Slow down instructions FUN95 7 81 7 82 Table instructions FUN100 114 7 84 7 101 Matrix instructions FUN120 1 3 0 7 103 7 113 NC positioning instructions FUN140 143 7 114 7 119...

Page 165: ...XT program loop Sa Sb a b M200 RST V M200 R0V FOR EN 70 EN 17 CMP BREAK EN 1 V EN NEXT 71 EN 08 MOV 15 D100 a b a b OVF S D D1000 V D10 Description The loop count used to execute the FOR and NEXT program loop is assigned by register D10 the program within the FOR and NEXT loop is designed to search the same data storing in D100 from the register table starting at R0 If it finds the searching loop ...

Page 166: ... operation Dividend and divisor are each formed by three consecutive registers starting by Sa and Sb respectively If the result is zero D 0 output will be set to 1 If divisor is zero then the ERR will be set to 1 and the resultant register will keep unchanged z All operands involved in this function are all 48 bits so Sa Sb and D are all comprised by 3 consecutive registers Example 48 bit division...

Page 167: ...f N is 0 or greater than 511 the operation will not be performed z Communication port1 or port2 can be used to serve as a general purpose ASCII communication interface If the data error detecting method is Check Sum this instruction can be used to generate the sum value for sending data or ot use this instruction to check if the received data is error or not Example 1 When M1 changes from OFF ON f...

Page 168: ...9 S N D z When operation control EN 1 or EN P instruction from 0 to 1 add the N successive 16 bit or 32 bit D instruction numerical values starting from S and then divided by N Store this mean value rounding off numbers after the decimal point in the register specified by D z While the N value is derived from the content of the register if the N value is not between 2 and 256 then the N range erro...

Page 169: ...bit V Z P0 P9 S D z When operation control EN 1 or EN P instruction from 0 to 1 take the square root rounding off numbers after the decimal point of the data specified by the S field and store the result into the register specified by D z While the S value is derived from the content of the register if the value is negative then the S value error flag ERR will be set to 1 and do not execute the op...

Page 170: ... R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 V Z P0 P9 D z When operation control EN 1 or EN P instruction from 0 to 1 negate ie calculate 2 s complement the value of the content of the register specified by D and store it back in the original D register z If the value of the content of D is negative then the negation operation will make it positive R 0 X0 EN 27P NEG z The instruction at left neg...

Page 171: ...0 WY240 WM0 WM1896 WS0 WS984 T0 T255 C0 C255 R0 R3839 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 V Z P0 P9 D z When operation control EN 1 or EN P instruction from 0 to 1 calculate the absolute value of the content of the register specified by D and write it back into the original D register R 0 X0 EN 28DP ABS z The instruction at left calculates the absolute value of the R0 register and stores ...

Page 172: ...truction extent the numerical value of a 16 bit register into an equivalent numerical value in a 32 bit register for example 33FFH converts to 000033FFH Its main function is for numerical operations CMP which can take the 16 bit or 32 bit numerical values as operand Before operation all the operand should be adjusted to the same length for proper operation R 0 X0 EN 29P EXT z The instruction at le...

Page 173: ...which can feed directly to the AO module or other output interface or leaved for further process The usage of PID control for process if properly can achieve a fast and smooth result of PV tracking toward SP change or immune to the disturbance of process z The PID formula in digital form Mn D4005 Pb En 0 n D4005 Pb Ti Ts En D4005 Pb Td PVn PVn 1 Ts Bias Mn Control output at time n Pb Proportional ...

Page 174: ...gth is invalid When communicating with the intelligent peripheral in binary data fromat the CRC16 error detection is used very often the well known Modbus RTU communication protocol uses this method for error detection of message frame CRC16 is the check value of a Cyclical Redundancy Check calculation performed on the message contents Perform the CRC16 calculation on the received message data and...

Page 175: ...20mA Setting at 10V Unipolar however there will exist the offset of the raw reading value this instruction is applied to eliminate the offset and convert the raw reading value into the range of 0 4095 12 bit or 0 16383 14 bit it is more convenient for following operation When execution control EN 1 it will execute the conversion starting from S length by N and then store the results into the D reg...

Page 176: ...peration control EN 1 or EN P instruction changes from 0 to 1 will perform the logical XOR exclusive or operation of data Sa and Sb The operation of this function is to compare the corresponding bits of Sa and Sb B0 B15 or B0 B31 and if bits at the same position have different status then set the corresponding bit within D as 1 otherwise as 0 z After the operation if all the bits in D are all 0 th...

Page 177: ...P0 P9 Sa Sb D When operation control EN 1 or EN P instruction changes from 0 to 1 will perform the logical XNR inclusive or operation of data Sa and Sb The operation of this function is to compare the corresponding bits of Sa and Sb B0 B15 or B1 B31 and if the bit has the same value then set the corresponding bit within D as 1 If not then set it to 0 After the operation if the bits in D are all 0 ...

Page 178: ...per limit SU then set the higher than upper limit flag S U to 1 If the value of S is smaller then the lower limit SL then set the lower than lower limit flag S L as 1 z The upper limit SU should be greater than the lower limit SL If SU SL then the limit value error flag ERR will set to 1 and this instruction will not carry out X0 EN R R 0 1 37P ZNCMP S R SL SU 2 INZ S U S L Y0 ERR z The instructio...

Page 179: ...ction changes from 0 to 1 take the Nth bit of the S data out and put it to the output bit OTB z When read control EN 0 or EN P instruction is not change from 0 to 1 The output OTB can be selected to keep at the last state if M1919 0 or set to zero if M1919 1 z When the operand is 16 bit the effective range for N is 0 15 For 32 bit operand D instruction it is 0 31 N beyond this range will set the N...

Page 180: ...1 D0 D4095 0 0 or 15 31 V Z P0 P9 D N z When write control EN 1 or EN P instruction changes from 0 to 1 will write the write bit INB into the Nth bit of register D z When the operand is 16 bit the effective range of N is 0 15 For 32 bit D instruction operand it is 0 31 N beyond this range will set the N value error flag ERR to 1 and do not carry out this instruction EN 41P BITWR D R 0 ERR X0 3 N X...

Page 181: ...D0 D4095 16 32 bit number V Z P0 P9 S Ns 0 31 D Nd 0 31 z When move control EN 1 or EN P instruction changes from 0 to 1 will move the bit status specified by Ns within S into the bit specified by Nd within D z When the operand is 16 bit the effective range of N is 0 15 For 32 bit D instruction operand the effective range is 0 31 N beyond this range will set the N value error flag ERR to 1 and do ...

Page 182: ...truction has a transition from 0 to 1 will move the Ns th nibble from within S to the nibble specified by Nd within D A nibble is comprised by 4 bits Starting from the lowest bit of the register B0 each successive 4 bits form a nibble so B0 B3 form nibble 0 B4 B7 form nibble 1 etc z When the operand is 16 bit the effective range of Ns or Nd is 0 3 For 32 bit D instruction operand the range is 0 7 ...

Page 183: ...o 1 move Nsth byte within S to Ndth byte position within D A byte is comprised of 8 bits Starting from the lowest bit of the register B0 each successive eight bits form a byte so B0 B7 form byte 0 B8 B15 form byte 1 etc z When the operand is 16 bit the effective range of Ns or Nd is 0 1 For 32 bit D instruction operand the range is 0 3 Beyond this range will set the N value error flag ERR to 1 and...

Page 184: ...T255 C0 C255 R0 R3839 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 V Z P0 P9 Da Db z When exchange control EN 1 or EN P instruction has a transition from 0 to 1 will exchanges the contents of register Da and register Db in 16 bits or 32 bits D instruction format X0 EN 45P XCHG Da Db R 1 R 0 z The instruction at left exchanges the contents of the 16 bit R0 and R1 registers B15 B0 Da R0 0 0 0 0 0 0 ...

Page 185: ...5000 R8071 D0 D4095 V Z P0 P9 D z When swap control EN 1 or EN P instruction has a transition from 0 to 1 swap the data of the low byte Byte 0 B0 B7 and the high byte Byte 1 B8 B15 in the 16 bit register specified by D B15 B8 B7 B0 Byte 1 high Byte 0 low X0 46P SWAP R 0 EN z The instruction at left swaps the data of the low byte B0 B7 and the high byte B8 B15 in R0 The results are as follows Byte1...

Page 186: ... in ascending order Nibbles not yet filled in D when N is odd are filled with 0 A nibble is comprised by 4 bits Starting from the lowest bit in the register B0 each successive four bits form a nibble so B0 B3 form nibble 0 B4 B7 form nibble 1 etc z This instruction only provides WORD 16 bit operand Because of this there are usually only 4 nibbles can be involved Therefore the effective range of N ...

Page 187: ...of N registers starting from D The nibbles other than NB0 in each of the registers within D are all set to zero A nibble is comprised by 4 bits Starting from the lowest bit in a register B0 each successive 4 bits form a nibble so B0 B3 form nibble 0 B4 B7 form nibble 1 etc z This instruction only provides WORD 16 bit operand Therefore there are usually only 4 nibbles can be involved so the effecti...

Page 188: ...nt peripheral in binary data format this instruction may be applied to do byte combination for following word data processing Example EN S N D M2 49P BUNIT R 1500 R 999 R 2500 Description When M2 changes from 0 1 it will perform the byte combination starting from R1500 the length is assigned by R999 and then store the results into registers starting from R2500 It is supposed R999 10 the results of...

Page 189: ...t if invalid range of length When communicating with intelligent peripheral in binary data format this instruction may be applied to do byte distribution for data transmission Example M2 EN S N R 999 R 1000 50P BDIST D R 1500 Description When M2 changes from 0 1 it will perform the byte distribution starting from R1000 the length is assigned by R999 and then store the results into registers starti...

Page 190: ...ter towards the left by N successive bits in ascending order After the lowest bit B0 has been shifted left its position will be replaced by shift in bit INB while the status of shift out bits B15 or B31 D instruction will appear at shift out bit OTB z If the operand is 16 bit the effective range of N is 1 16 For 32 bits D instruction operand it is 1 32 Beyond this range will set the N value error ...

Page 191: ...r towards the right by N successive bits in descending order After the highest bits B15 or B31 D instruction have been shifted right their positions will be replaced by the shift in bit INB while shift out bit B0 will appear at shift out bit OTB z If the operand is 16 bit the effective range of N is 1 16 For 32 bits D instruction operand it is 1 32 Beyond this range will set the N value error flag...

Page 192: ...towards the left by N successive bits in ascending order ie in a 16 bit instruction B0 B1 B1 B2 B14 B15 B15 B0 In a 32 bit instruction B0 B1 B1 B2 B30 B31 B31 B0 At the same time the status of the rotated out bits B15 or B31 D instruction will appear at rotate out bit OTB z If the operand is 16 bit the effective range of N is 1 16 For 32 bits D instruction operand it is 1 32 Beyond this range will...

Page 193: ...egister towards the right by N successive bits in descending order ie in a 16 bit instruction B15 B14 B14 B13 B1 B0 B0 B15 In a 32 bit instruction B31 B30 B30 B29 B1 B0 B0 B31 At the same time the status of the rotated out B0 bits will appear at the rotate out bit OTB z If the operand is 16 bit the effective range of N is 1 16 For 32 bits D instruction operand it is 1 32 Beyond this range will set...

Page 194: ...4095 0 FFFFH 0 FFFFFFFFH V Z P0 P9 S D When operation control EN 1 or EN P instruction changes from 0 1 it will perform the code conversion where S is the source Binary code and D is the destination Gray code for storing the result The conversion method shown as below 1 1 0 0 1 0 0 0 1 1 1 0 1 1 0 1 XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR XOR 1 1 0 1 0 0 1 0 1 0 0 1 1 0 1 1 Example...

Page 195: ...ON FUN55 D P B G Example 2 When M0 1 it will be perform the 32 bit code conversion S D R100 R0 M0 EN 55DP B G Converting the 32 bit Binary code in DR0 into Gray code and then storing the result into DR100 DR0 00110111001001000010111100010100B Î DR100 00101100101101100011100010011110B ...

Page 196: ...904 R3967 R3968 R4167 R5000 R8071 D0 D4095 0 FFFFH 0 FFFFFFFFH V Z P0 P9 S D When operation control EN 1 or EN P instruction changes from 0 1 it will perform the code conversion where S is the source Gray code and D is the destination Binary code for storing the result The conversion method shown as below Example 1 When M0 changes from 0 1 it will perform the 16 bit code conversion M0 EN S D D100 ...

Page 197: ...ION FUN56 D P G B Example 2 When M0 1 it will perform the 32 bit code conversion S D M0 EN D0 D100 56DP G B Converting the 32 bit Gray code in DD0 into Binary code and then storing the result into DD100 DD0 00110111001001000010111100010100B Î DD100 00100101110001111100101000011000B ...

Page 198: ... provides 16 bit operand which means S only has B0 B15 Therefore the effective range of Ns is 0 15 and the NL length of the decode value is limited to 1 8 bits Therefore the width of the decoded result D is 2 1 8 points 2 256 points 1 16 words if 16 points are not sufficient 1 word is still occupied If the value of NS or NL is beyond the above range will set the range error flag ERR to 1 and do no...

Page 199: ...rst bit with the value of 1 and the relative bit number of this point will be stored into the low byte B0 B7 of encoded resultant register D and the high byte of D will be filled with 0 bNL 1 bH bL b0 Relative bit number BNS NL 1 BNS B15 B1 B0 Direction of extension 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 S High Total NL discrete points Low High priority search direction Ø Low priority search ...

Page 200: ...example When X0 goes from 0 to 1 will take out toward left 36 successive bits starting from B9 b0 specified by Ns within S and perform high priority encoding because H L 1 That is starting from b35 encoding end point move right to find the first bit with the value of 1 The resultant value of this example is b26 so the value of D is 001AH 26 as shown in the diagram below S D b0 B15 B9 B0 R0 0 0 0 0...

Page 201: ...e 0 B4 B7 form nibble 1 etc within S to 7 segment code and store the code into a low byte of D High bytes does not change The 7 segment within D are put in sequence with a segment placed at B6 b segment at B5 g segment at B0 B7 is not used and is fixed as 0 For details please refer the 7 segment code and display pattern table shown in page 9 31 Because this instruction is limited to 16 bits and S ...

Page 202: ...d digit R0 0056H Î R100 5B5FH 56 Example 3 When M1 ON converting hexadecimal to 7 Segment M1 EN S N R0 59 7SG D R100 ERR 2 Instruction at left will convert the first second and third digit of R0 to 7 segment and store in R100 and R101 The low byte of R100 stores first digit The high byte of R100 stores second digit The low byte of R101 stores third digit The high byte of R10 remain unchanged Origi...

Page 203: ...0 0 1 1 1 1 1 1 0 1 0001 0 0 1 1 0 0 0 0 2 0010 0 1 1 0 1 1 0 1 3 0011 0 1 1 1 1 0 0 1 4 0100 0 0 1 1 0 0 1 1 5 0101 0 1 0 1 1 0 1 1 6 0110 0 1 0 1 1 1 1 1 7 0111 0 1 1 1 0 0 1 0 8 1000 0 1 1 1 1 1 1 1 9 1001 0 1 1 1 1 0 1 1 A 1010 0 1 1 1 0 1 1 1 B 1011 0 0 0 1 1 1 1 1 C 1100 0 1 0 0 1 1 1 0 D 1101 0 0 1 1 1 1 0 1 E 1110 0 1 0 0 1 1 1 1 F 1111 B1 B2 B6 B5 B4 B0 B3 B7 P a f e c g b d 0 1 0 0 0 1 1...

Page 204: ...d in S S has a maximum of 12 alphanumeric character into ASCII and store it into registers starting from D Each 2 alphanumeric characters occupy one 16 bit register The application of this instruction most often stores alphanumeric information within a program and waits until certain conditions occur then converts this alphanumeric information into ASCII and conveys it to external display devices ...

Page 205: ... B14 B0 are used to represent the time value While bit B15 is used to express whether the time values are positive or negative When B15 is 0 it represents a positive time value and when B15 is 1 it represents a negative time value The B14 B0 time value is represented in binary and when the time value is negative B14 B0 is represented with the 2 s complement The number of seconds that results from ...

Page 206: ...hr 32767 hr The bit B31 of the second register is used as the sign bit of the second value The bits B15 of each register are used as the sign bit of the hour minute second value z As shown in the diagram above after convert to hour minute second value the minute second value can only be in the range of 59 to 59 and the hour number can be in the range of 32768 to 32767 hours Because of this the max...

Page 207: ... z When conversion control EN 1 or EN P instruction changes from 0 1 it will convert the N successive hexadecimal ASCII character 0 9 A F convey by 16 bit registers Low Byte is effective into hexadecimal value and store the result into the register starting with D Every 4 ASCII code is stored in one register The nibbles of register which does not involve in the conversion of ASCII code will remain...

Page 208: ... hexadecimal value and store to low byte high byte remain unchanged of R100 R0 0039H 9 Originally R100 0000H R1 0041H A Î R100 009AH Example 3 When M1 is ON ASCII code converted to hexadecimal value M1 EN S N R0 63 HEX D R100 3 Converts the ASCII code of R0 and R1 into hexadecimal value and store result into R100 nibble 3 remain unchanged R0 0039H 9 Originally R100 0000H R1 0041H A R2 0045H E Î R1...

Page 209: ... R3840 R3903 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 16 bit number V Z P0 P9 S N 1 511 D z When conversion control EN 1 or EN P instruction changes from 0 1 will convert the N successive nibbles of hexadecimal value in registers start from S into ASCII code and store the result to low byte high byte remain unchanged of the registers which start from D z The conversion will not be performed wh...

Page 210: ...0 64 SCII Converts the NB0 NB1 of R0 to ASCII code and stores it into R100 R101 high bytes remain unchanged R0 009AH Î R100 0039H 9 R101 0041H A Example 3 When M1 is ON it converts hexadecimal value to ASCII code M1 EN S N R0 64 SCII D R100 3 Converts the NB0 NB2 of R0 to ASCII code and stores it into R100 R102 R0 0123H Î R100 0031H 1 R101 0032H 2 R102 0033H 3 Example 4 When M1 is ON it converts h...

Page 211: ...fter the END instruction will continue to be executed as the END instruction is not exist z This instruction may be placed more than one point within a program and its input end control EN controls the end point of program execution It is especially useful for debugging and for testing z It s not necessary to put any END instructions in the main program CPU will automatic restart to start point wh...

Page 212: ...rmal program labels Reserved words Description X0 I X15 I INT0 INT15 X0 I X15 I INT0 INT15 labels for external input X0 X15 interrupt service routine HSC0I HSC7I labels for high speed counter HSC0 HSC7 interrupt service routine 1MSI 1MS 2MSI 2MS 3MSI 3MS 4MSI 4MS 5MSI 5MS 10MSI 10MS 50MSI 50MS 100MSI 100MS Labels for 8 kinds of internal timer interrupt service routine HSTAI ATMRI Label for High sp...

Page 213: ...re the address of JMP instruction However care should be taken if the jump action cause the scan time exceed the limit set by the watchdog timer the WDT interrupt will be occurred and stop executing z The jump instruction allows only for jumping among main program or jumping among subroutine area it can t jump across main subroutine area 66 JMP PATHB Program A 65 LBL Program B X0 EN PATHB In the l...

Page 214: ...all the other subroutines so called the nested subroutines for up to 5 levels at the most include the interrupt routine 1X 2X 3X 4X 5X RTS RTS RTS RTS Main program area Subroutine area CALL SUB1 LBL SUB1 CALL SUB2 CALL SUB3 CALL SUB4 LBL SUB2 LBL SUB3 LBL SUB4 65 LBL SUB1 Program 1 65 LBL SUB2 Program 2 66 JMP SUB3 65 LBL SUB3 Program 3 68 RTS SUB3 SUB2 SUB1 z Interrupt service programs HSC0I HSC7...

Page 215: ...dress immediately after the CALL instruction which were previously executed and will continue to execute the program z If this instruction encounters any of the three flow control instructions MC SKP or JMP then this instruction may not be executed it will be regarded as not exist If the above instructions are used in the subroutine and causing the subroutine not to execute the RTS instruction the...

Page 216: ...t need to be scanned to execute the interrupt is a more real time in response to the event of the outside world In addition the interrupt service program cannot be called by label name therefore we preserve the special reserved words label name to correspond to the various interrupts offered by PLC check FUN65 explanation for details For example the reserved word X0 I is assigned to the interrupt ...

Page 217: ...he first FOR instruction and the last NEXT instruction are the outermost first level of a nested loop The second FOR instruction and the second last NEXT instruction are the second level the last FOR instruction and the first NEXT instruction form the loop s innermost level 71 NEXT FOR 4 FOR 3 70 FOR 2 NEXT NEXT 70 70 71 71 2 3 1 In the example in the diagram at left loop c will be executed 4 3 2 ...

Page 218: ...d directly to the power line and cannot be in series with any conditions z When PLC has not yet entered the loop has not yet executed to the FOR instruction or has executed but then jumped out but the NEXT instruction is reached then PLC will not take any action just as if this instruction did not exist z For the usage of this instruction please refer to the explanations for the FOR instruction on...

Page 219: ...When refresh control EN 1 or EN P instruction has a transition from 1 to 0 then the status of N input points or output points D D N 1 will be refreshed The I O points for FBs PLC s immediate I O are only limited to I O points on the main unit The table below shows permissible I O numbers for 20 32 40 and 60 point main units Main unit type Permissible numbers 20 points 32 points 40 points 60 points...

Page 220: ... can store up to 4 digits and for the 32 bit operand 8 digits may be stored When the key numbers full fill the D register new key in number will kick out the oldest key number of the D register The key in status of the 10 input points starting from IN will be recorded on the 10 corresponding coil starting from KL These coils will set to 1 while the corresponding key is depressed and remain unchang...

Page 221: ...w the cdefghi sequence in the following diagram At step c and i the X20 is 0 so there was no key generated only steps defgh are effective Because the register can only hold 4 key numbers Of these 5 steps the first key was kick out The key strokes 3302 of the steps efgh are entered in the R0 register X20 X0 X1 X2 X3 M0 M1 M2 M3 Y0 R0 0000 0001 0013 1330 3302 3 4 5 6 1 2 4 6 0000 0001 0013 0133 1330...

Page 222: ...ys just like the usual discrete input The actions of the numeric keys and the function keys are independent and have no effect on each other z When execution control EN 1 this instruction will scan the numeric keys and function keys in the matrix formed by the 4 input points starting from IN and the 4 output points starting from OT For the function of the numeric keys and NKP output please refer t...

Page 223: ...set to 1 and get the digit data respectively into 10 0 ones 10 1 tens 10 2 hundreds and 10 3 thousands As long as EN is 1 PLC will scan and read out in continuous cycles When each complete cycle is finished i e the 4 digit readout of 10 0 10 3 is completed the readout completed flag DN is set to 1 However it is only kept for one scan If any digital readout value is not within the range of 0 9 BCD ...

Page 224: ...ent out so that the digital value will be loaded and latched into the 7 segment display respectively z When in D 32 bit instruction nibbles 0 3 from the S register and nibbles 0 3 from the S 1 register are transferred separately to OT0 OT3 and OT8 OT11 Because they are transferred at the same time they can use the same latch signal 16 bit instructions do not use OT8 OT11 z As long as EN remains 1 ...

Page 225: ...c latch permits the display numerical values to enter through the latch i e be loaded When the latch signal is 1 the numerical values in the latch are latched maintained and with negative logic they are not The following diagram of a CD 4511 7 segment display IC is an example of a positive logic numerical value input with latch 4bit latch BCD to 7 segment LED Drive CD4511 1 A 2 B 4 C 8 D 10 LE Lat...

Page 226: ...oes through N output points starting from the OT output point Each scan one of the N bits will set to 1 and the corresponding line will be selected OT0 responsible for first line while OT1 responsible for second line etc Until it read all the N lines the 8 N status that has been read out is then stored into the register starting at D and the execution completed flag DN is set as 1 but is only kept...

Page 227: ...ut control EN should kept to 1 If it is changed to 0 it will stop the pulse sending output point become OFF and the flag OUT changes back to 0 but the other status or data will keep unchanged However when its EN changes again from 0 to 1 it will lead to a reset action and treat as a new start the entire procedure will be restarted again z If you want to pause the pulse output and not to restart th...

Page 228: ...xceeds the range this instruction will not be carried out and the error flag ERR will set to 1 EN 81D PLSO X0 DN MD PC Fr UY DY HO 0 R 0 R 1 Y 0 Y 1 R 5 X1 X2 U D PAU OUT ERR M1 M0 z In this example the program controls the stepping motor to drive forward for 80 pulses steps at the speed of 100Hz first and then makes it turn reverse for 40 pulses the speed of 50Hz Make sure that the up down direct...

Page 229: ...ion control EN 1 will send the pulse to output point OT with the ON state for To ms and period as Tp OT must be a transistor output point on the main unit When EN is 0 the output point will be OFF To Tp z The units for Tp and To are mS resolution is 1 mS The minimum value for To is 0 under such case the output point OT will always be OFF and its maximum value is the same as Tp under such case the ...

Page 230: ...used to store counting results D1 and D2 are used to store current counting values and sampling duration z When detection control EN 1 it starts to calculate the pulse count for the S input point which can be shown in D1 register Meanwhile the sampling timer D2 is switched on and keeps counting until the value of D2 is reach to the sampling period TI The final counted value is stored into the D0 r...

Page 231: ... input ON 0 if Md 0 this instruction will perform the display pattern conversion where S is the starting address storing the begin converted characters Ns is the pointer to locate the starting address character Nl tells the length of begin converted characters and D is the starting address to store the converted result Byte 0 of S is the 1st displaying character byte 1 of S is the 2nd displaying c...

Page 232: ...6 7 SEGMENT DISPLAY FUN 84 TDSP x000 x001 x010 x011 x100 x101 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 MSB LSB If you don t find the pattern that you want in left table you can create the pattern by yourself just reference below table ...

Page 233: ...sion is as follows Mn Kc En 0 n Kc Ti Ts En Kc Td PVn PVn 1 Ts Where Mn Output at time n Kc Gain Range 1 9999 Pb 100 Kc Ti Integral tuning constant Range 0 9999 equivalent to 0 00 99 99 Repeat Minute Td Derivative tuning constant Range 0 9999 equivalent to 0 00 99 99 Minute Md Selection of PID method 0 Modified minimum overshoot method 1 Universal PID method Yn Starting address of PID ON OFF outpu...

Page 234: ...of gain value Kc is 110 where Pb 1000 110 0 1 0 91 the system full range is 1638 it means 1638 0 91 14 8 to enter proportional band control z The default of integral tuning constant is 17 it means the reset time is 6 minutes Ti 100 6 17 z The default of derivative tuning constant is 50 it means the rate time is 0 5 minutes Td 50 z When changing the PID solution interval it may tune the parameters ...

Page 235: ...int is in zone The content of the two registers WR 2 and WR 3 are the warning bit registers they indicate that whether there exists the highest temperature warning or heating circuit opened Bit definition of WR 2 explained as follows Bit0 1 it means that there exists the highest warning or heating circuit opened at the Sn 0 point Bit15 1 it means that there exists the highest warning or heating ci...

Page 236: ...means that 2 nd point needs PID temperature control Bit15 1 means that 16 th point needs PID temperature control The default of R4012 is FFFFH z R4013 Each bit of R4013 to tell the need of PID temperature control Bit0 1 means that 17 th point needs PID temperature control Bit1 1 means that 18 th point needs PID temperature control Bit15 1 means that 32 th point needs PID temperature control The de...

Page 237: ...M is 1 it is the same as a basic timer but when TIM is 0 it does not clear but keeps the current value If the timer need to clear then change enable control EN to 0 When timing control TIM is once again to be 1 it will continue to accumulate from the previous value when the timer last paused In addition this instruction also has two outputs Time up TUP when time up it is 1 usually it is 0 and Time...

Page 238: ... will output Y0 become energized ON z Off delay de energizing timer X0 TIM CV PV 10 R 0 89 T1S TUP Y0 NUP EN z This timer s output Y0 is usually energized When this timer s timing control X0 is off only after delay by 10 sec will output Y0 become de energized OFF z The diagram below shows the relation on input and output for the above 4 kinds of timers OFF OFF OFF OFF OFF OFF ON ON ON ON ON ON ON ...

Page 239: ...s suddenly damaged and there is no way to execute the program or refresh I O then after the WDT time expired the WDT will automatically switch off all the I Os so as to ensure safety In certain applications if the scan time is too long it may cause safety problems or problems of non conformance with control requirements This instruction can used to establish the limitation of the scan time that yo...

Page 240: ... be activated and PLC will be shut down If trigger the WDT once every time before the WDT time N has been reached then WDT will never be activated PLC can use this feature to ensure the safety of the system Each time when PLC enters into system housekeeping after finished the program scanning and I O refresh it will usually trigger WDT once so if the system functions normally and scan time does no...

Page 241: ...e CV value from hardware HSC and put it into the register which control program can access The following is the arrangement of CV PV in ASIC and their corresponding CV PV registers of PLC for HSC0 HSC3 PLC register ASIC DR4096 CV CV register H L HSC0 DR4098 PV HSC0 PV register H L DR4100 CV CV register H L HSC1 DR4102 PV HSC1 PV register H L DR4104 CV CV register H L HSC2 DR4106 PV HSC2 PV registe...

Page 242: ...upply for FBs PLC the values of current value registers CV of HSC0 HSC3 within ASIC will be read out and wrote into the HSC0 HSC3 CV registers with power retentive function of CPU automatically When power comes up these CV values will be restored to ASIC However if your application demands that when power is on the values should be cleared to 0 or begin counting from a certain value then you have ...

Page 243: ... must be follow the ASCII file format the details described in chapter 15 otherwise this instruction will halt the transmission and set the error flag ERR to 1 If the entire file is correctly and successfully transmitted then the output is completed and DN is set to 1 z The control input of this instruction is of positive edge triggered Once EN changes from 0 1 then this instruction starts the exe...

Page 244: ...MD 0 ON it represents that the RTS connect to the CTS of PLC of the printer is False I e the printer is not ready or abnormal OFF it represents that the RTS of the Printer is True Printer is Ready Note Using the M1927 associates with timer can detect if the printer is abnormal or not R4158 The setting of communication parameters refer to section 11 7 2 ...

Page 245: ... 1 it will increase by PV every 0 01 sec When the D value reaches the SU value the output ASU 1 When U D 0 it will load the value of SU to register D When M1974 0 it will be decreased by SU SL PV every 0 01 sec or when M1974 1 it will be decreased by PV every 0 01 sec When the D value reaches the SL value the output ASL 1 z The ramping direction U D is determined at the time when input control EN ...

Page 246: ...imer T20 to 0 If M2 1 it will load the R101 lower limit value into the R103 and it will increase the output with fixed value R102 R101 R100 for every 0 01 second and stores it to register R103 When the T2 timer going up to the preset value R100 the output value equals to R102 and the output M102 will set to 1 If M2 0 will load the R102 upper limit value into the R103 and it will decrease the outpu...

Page 247: ...py compare search etc between tables and registers or between tables These instructions are convenient for application Among the table instructions most instructions use a pointer to specify which register within a table will be the target of operation The pointer for both 16 and 32 bit table instructions will always be a 16 bit register The effective range of the pointer is 0 to L 1 which corresp...

Page 248: ...as already reached L 1 point to the last register in the table then it will only set the move to end flag END to 1 and finish execution of this instruction If the Pr value is less than L 1 then it must again check the pointer increment INC input signal If INC is 1 then Pr value will be also increased Besides pointer clear CLR is able to operate independently without being influenced by other input...

Page 249: ...l then check the value of Pr If the Pr value has already reached L 1 point to the last register in the table then it sets the move to end flag to 1 and finishes executing of this instruction If Pr is less than L 1 it check the status of INC If INC is 1 then it will increase Pr and finish the execution of this instruction Besides pointer clear CLR can execute independently and is not influenced by ...

Page 250: ... has been completed it will then check the value of pointer Pr If the Pr value has already reached L 1 point to the last register on the table then it will set the move to end flag END to 1 and finish executing of this instruction If the Pr value is less than L 1 it will check the status of INC If INC is 1 then the Pr value will be increased by 1 before execution Besides pointer clear CLR can exec...

Page 251: ...nsition from 0 to 1 all the data from source table Ts length L is copied to the destination table Td which is the same length z One table is completely copied every time this instruction is executed so if the table length is long it will be very time consuming In practice P modifier should be used to avoid time waste caused by each scan repeating the same movement action X0 EN TS R 0 Td R 10 L 10 ...

Page 252: ...the contents of Table a and Table b will be completely swapped z This instruction will swap all the registers specified in L each time the instruction is executed so if the table length is big it will be very time consuming therefor P instruction should be used X0 EN TS R 0 Td R 10 L 10 104P T_SWP z The diagram at left below is the status before execution When X0 from 0 1 the contents of R0 R9 in ...

Page 253: ...jective flag FND will set to 1 When the searching has searched to the last register of the table the execution of the instruction will stop whether it was found or not In that case the search to end flag END will be set to 1 and the Pr value will stop at L 1 When this instruction next time is executed Pr will automatically return to the head of the table Pr 0 before the search begin z The effectiv...

Page 254: ...ll be set to 1 and the pointer value will stop at L 1 When this instruction is executed next time Pr will automatically return to the head of the table to begin the search z The effective range of Pr is 0 to L 1 The Pr value should not changed by other programs during the operation As this will affect the result of the search If the Pr value not in the effective range the pointer error flag ERR wi...

Page 255: ...ntrol EN 1 or EN P instruction has a transition from 0 to 1 the Rs data will be filled into all the registers of the table Td z This instruction is mainly used for clearing the table fill 0 or unifying the table filling in the same values It should be used with the P instruction X0 EN TS Td L 107P T_FIL 5555 R 0 10 z The instruction at left will fill 5555 into the whole table Td The results are as...

Page 256: ... The room created by the shift operation will be filled by IW and the results will be written into table Td The data shifted out will be written into OW X0 EN TS Td R 11 L OW L R 10 R 10 R 0 IW R 0 X1 108P T_SHF z In the program at left Ts and Td is the same table Therefore the table shifts itself and then writes back to itself the table must be writ able It first perform a shift left operation le...

Page 257: ...L R 0 The results of the rotation will then be written onto table Td X0 EN TS Td L L R X1 109P T_ROT 10 R 0 R 0 z In the program at left Ts and Td is the same table The table after rotation will write back to itself It first perform one left rotation let X1 1 and X0 go from 0 1 and then performs one right rotation let X1 0 and X0 go from 0 1 The results are shown at right in the diagram below Rota...

Page 258: ...that first pushed into the queue will be the first to pop out from the queue A queue is comprised of L consecutive 16 or 32 bit registers D instruction starting from the QU register as in the diagram below Pr 4 IW QU g5555 QU1 f4444 QU2 e3333 QU3 d2222 QU4 c1111 OW QU5 c gis the sequence number of operation QUL z When execution control EN 1 or EN P instruction has a transition from 0 to 1 the stat...

Page 259: ...error will be created If there is a specific application which requires the setting of a Pr value then its permissible range is 0 to L 0 means empty and 1 to L respectively correspond to QU1 to QUL Beyond this range the pointer error flag ERR will be set as 1 and this instruction will not be carried out X0 EN OW ERR X1 I O 110P QUEUE R 0 R 2 QU IW 10 L Pr R 1 R 20 EPT FUL z The program at left ass...

Page 260: ...rst to be popped out of the stack The stack is comprised of L consecutive 16 or 32 bit D instruction registers starting from ST as shown in the following diagram Pr 4 c g is the sequence number of operation ST ST1 c1111 Bottom of stack ST2 d2222 ST3 e3333 IW ST4 f4444 OW g5555 ST5 push STL z When execution control EN 1 or EN P instruction has a transition from 0 to 1 the status of in out control I...

Page 261: ...pty 1 to L respectively correspond to ST1 to STL Beyond this range the pointer error flag ERR will set to 1 and the instruction will not be carried out X0 EN Pr R 20 L OW I O 10 R 2 IW R 1 FUL ERR EPT X1 R 0 111P STACK ST z The program at left assumes that the initial content of the stack is just as in the diagram of a stack on the preceding page The operation illustrated in this example is to pus...

Page 262: ...son of all the L pairs of upper and lower limits is completed z When M1975 0 if there is any pair where the upper limit value is less than the lower limit value then the limit error flag ERR will be set to 1 and the comparison output for that pair will be 0 z When M1975 1 there is no restriction on the relation of upper limit and lower limit this can apply for 360 rotary electronic drum switch app...

Page 263: ...own within dotted line in diagram below While the upper and lower limits are being adjusted you can change at will the range of the activated angle of the drum This cannot be done with the traditional drum mechanism Equivalent mechanical drum emulated by above program X1 80 90 40 Limit sw 320 0 Y5 140 180 220 180 Y6 60 Y7 200 80 Y8 Rotary encoder Rotating mechanism Y5 Y6 Y7 Y8 C0 40 140 80 180 60 ...

Page 264: ...rs with ascending order if A D 1 or descending order if A D 0 and put the sorted result to the registers starting by D register The valid data length of sort operation is between 2 and 127 other length will set the ERR to 1 and the sort operation will not perform X0 EN R 0 A D 113DP SORT D S L R 10 10 The example at left sorts the table comprised of R0 R9 and stores the sorted data to the table lo...

Page 265: ...M1896 WS0 WS984 T0 T255 C0 C255 R0 R3839 R3840 R3903 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 V Z P0 P9 D N 1 511 When operation control EN 1 or EN P instruction changes from 0 1 it will perform the write operation according to the input status of write selection the specified area of registers or bits will all be reset to 0 1 0 0 or set to 1 1 0 1 X0 EN 114 Z WR R0 N 10 I O D ERR Above exampl...

Page 266: ...ster or not the operation object is the bit not numerical value Matrix instructions are used mostly for discrete status processing such as moving copying comparing searching etc of single point to multipoint matrix or multipoint to multipoint These instructions are convenient important for application Among the matrix instructions most instruction need to use a 16 bit register as a pointer to poin...

Page 267: ...peration is done by bits with the same bit numbers For example if Ma0 0 Mb0 1 then Md0 0 if Ma1 1 Mb1 1 then Md1 1 etc right up until AND reaches Ma16L 1 and Mb16L 1 Ma Mb AND Md L X0 EN R 0 120P MAND L Ma Mb Md R 10 R 20 5 z In the program at left when X0 goes from 0 1 then matrix Ma comprised by R0 to R4 and matrix Mb comprised by R10 to R14 will do an AND operation The results will be stored ba...

Page 268: ...n Md0 1 if Ma1 0 Mb1 0 then Md1 0 etc right up until OR reaches Ma16L 1 and Mb16L 1 L Ma Mb Md OR X0 EN Ma Mb L 5 R 10 R 0 Md 121P MOR R 10 z In the program at left when X0 goes from 0 1 then matrix Ma comprised by R0 to R4 and matrix Mb comprised by R10 to R14 will do an OR operation The results will then be stored into the destination matrix Md comprised by R10 to R14 In this example Mb and Md i...

Page 269: ...XOR operation is done by bits with the same bit numbers for example if Ma0 0 Mb0 1 then Md0 1 if Ma1 1 Mb1 1 then Md1 0 etc right up until XOR reaches Ma16L 1 and Mb16L 1 L Ma Mb Md XOR X0 EN Ma Mb R 20 L 5 R 10 R 0 Md 122P MXOR z In the program at left when X0 goes from 0 1 will perform a XOR operation between matrix Ma comprised by R0 to R4 and matrix Mb comprised by R10 to R14 The results will ...

Page 270: ...one by bits with the same bit numbers For example if Ma0 0 Mb0 1 then Md0 0 Ma1 0 Mb1 0 then Md1 1 etc right up until XNR reaches Ma16L 1 and Mb16L 1 L Ma Mb Md XNR X0 EN Ma Mb R 10 L 5 R 10 R 0 Md 123P MXNR z When operation control EN 1 or EN P instruction goes from 0 to 1 will perform a XNR operation between Ma matrix comprised by R0 R9 and Mb matrix comprised by R10 R19 The results will then be...

Page 271: ...l change to 0 and all those with a value of 0 will change to 1 The results will then be stored into destination matrix Md L Md Ms Ms Inverse X0 EN Ma 124P MINV L 5 R 0 Md R 0 z In the program at left when X0 goes from 0 1 the matrix comprised by R0 to R4 will be inverted and then store back into itself because in this example Ms and Md are the same matrix The results obtained are shown at right in...

Page 272: ... happen then The compare to end flag END will be set as 1 and the Pr value will set to 16L 1 and the next time that this instruction is executed Pr will automatically return to the starting point of the matrix Pr 0 to begin the comparison search L Ma Mb Mapr Mbpr Pr z The range for the pointer value is 0 to 16L 1 The Pr value should not be changed by other instructions as this will affect the resu...

Page 273: ...pleted If the Pr value has already reached 16L 1 the final bit then the read to end flag END will be set to 1 If Pr is less than 16L 1 then the status of pointer increment INC will be checked If INC is 1 then Pr will be increased by 1 Besides this pointer clear CLR can execute independently and is not affected by other input L Pr Mspr Ms OTB z The effective range of the pointer is 0 to 16L 1 Beyon...

Page 274: ...an 16L 1 and INC is 1 then the pointer will increased by 1 Besides this pointer clear CLR can execute independently and is not affected by other input L Pr Mspr Ms OTB z The effective range of Pr is 0 to 16L 1 Beyond this range the pointer error flag ERR will be set to 1 and this instruction will not be carried out X0 EN END L Pr INB ERR 5 R 20 Ms R 0 INC CLR X1 127P MBWR z In the program at left ...

Page 275: ...d with a right shift it will be M16L 1 is replaced by the status of fill in bit INB The status of the bits popped out with a left shift it will be M16L 1 and with a right shift it will be M0 will appear at the output bit OTB Then the results of this shifted matrix will be filled into the destination matrix Md z The program at left is an example where Ms and Md are the same matrix When X0 goes from...

Page 276: ...s of the rotated out bit with a left rotation it will be M16L 1 and with a right rotation it will be M0 The rotated out bit will not only be used to fill the above mentioned space it will also be transferred to rotated out bit OTB L Ms Md Shift right 1 bit OTB L R 0 X0 EN L Md 5 OTB Ms R 0 R 0 L R 129P MBROT z In the program at left Ms and Md are the same matrix When X0 goes from 0 1 then the whol...

Page 277: ...a status of 1 when input 1 0 1 or the total amount of bits with a status of 0 when input 1 0 0 The results of the counting will be stored into the register specified by D If the value of these amounts is 0 then the Result is 0 flag D 0 will be set to 1 X0 EN Ms R 0 130P MBCNT X1 1 0 L 5 D 0 D R 0 z The program at left sets X1 first as 0 to count bits with status of 0 and then as 1 to count bits wi...

Page 278: ...55 R0 R3839 R3840 R3903 R3904 R3967 R3968 R4167 R5000 R8071 D0 D4095 Pw 0 3 Op 0 1 Rs 0 1 Pn 0 255 OR 0 1000 WR Description z When operation control EN 1 the specified digital output will perform the PWM output the expression for output frequency as shown bellow 1 1 P 184320 f n pwm while Rs Resolution 1 100 2 1 P 18432 f n pwm while Rs Resolution 1 1000 Example 1 If Pn Setting of output frequency...

Page 279: ...ple 2 If Pn Setting of output frequency 200 Rs 1 1 1000 then 1 200 18432 fpwm 91 7Hz T Period pwm f 1 10 9mS For Rs 1 1000 if OR Setting of output pulse width 10 then T0 109uS if OR Setting of output pulse width 800 then To 8 72mS Output waveform 1 Pn Output frequency 200 Rs 1 1 1000 OR Output pulse width 10 2 Pn Output frequency 200 Rs 1 1 1000 OR Output pulse width 800 ...

Page 280: ...992 Ps1 M1993 Ps2 M1994 and Ps3 M1995 is ON respectively it will start to execute from the next step of positioning point when goes to the last step it will be restarted from the first step if Ps0 3 is controlled by other FUN140 instruction the status of Ps0 M1992 Ps1 M1993 Ps2 M1994 and Ps3 M1995 are OFF this instruction will wait and acquires the control right of output point immediately right a...

Page 281: ...stem default for parameter values is matching what user demanded then this instruction is not needed However if it needs to change the parameter value dynamically this instruction is required hThis instruction incorporates with FUN140 for positioning control purpose hWhether the execution control input EN 0 or 1 this instruction will be performed hWhen there are any errors in parameter value the o...

Page 282: ...e the assigned number set of HSPSO High Speed Pulse Output to stop pulse output z While in the application for mechanical original point reset as soon as reach the original point can use this instruction to stop the pulse output immediately so as to make the original point stop at the same position every time when performing mechanical original point resetting z For detailed functional description...

Page 283: ...0 is Low Word and D11 is High Word HR DR ROR K Range Ope rand R0 R3839 D0 D4095 R5000 R8071 2 256 Ps 0 3 D Command descriptions z When execution control En 1 or EN P instruction changes from 0 1 this instruction will convert the assigned current pulse position PS to be the mm or Deg Inch or PS that has same unit as the set value so as to make current position displaying z Only when the FUN140 inst...

Page 284: ...X12 I X12 positive edge interrupt X0 I X0 positive edge interrupt X6 I X6 negative edge interrupt X12 I X12 negative edge interrupt X0 I X0 negative edge interrupt X7 I X7 positive edge interrupt X13 I X13 positive edge interrupt X1 I X1 positive edge interrupt X7 I X7 negative edge interrupt X13 I X13 negative edge interrupt X1 I X1 negative edge interrupt X8 I X8 positive edge interrupt X14 I X1...

Page 285: ...X6 I X6 positive edge interrupt X12 I X12 positive edge interrupt X0 I X0 positive edge interrupt X6 I X6 negative edge interrupt X12 I X12 negative edge interrupt X0 I X0 negative edge interrupt X7 I X7 positive edge interrupt X13 I X13 positive edge interrupt X1 I X1 positive edge interrupt X7 I X7 negative edge interrupt X13 I X13 negative edge interrupt X1 I X1 negative edge interrupt X8 I X8 ...

Page 286: ...rt ABT are 0 and if Port 1 2 3 4 hasn t been controlled by other communication instructions i e M1960 Port1 M1962 Port2 M1936 Port3 M1938 Port4 1 this instruction will control the Port 1 2 3 4 immediately and set the M1960 M1962 M1936 M1938 to be 0 which means it is being occupied then going on a packet of data transaction immediately If Port 1 2 3 4 has been controlled M1960 M1962 M1936 M1938 0 t...

Page 287: ... the communication program stored in data registers and base on the parsing result send the data from port2 to ASCII peripherals such as computer other brand PLC inverter moving sign etc this kind of device can command by ASCII message The operation can set to be 1 transmit only which ignores the response from peripherals 2 transmit and then to receive the response from peripherals When operate wi...

Page 288: ...ontrol EN 1 or EN P instruction changes from 0 1 it will perform the read R W 1 or write R W 0 file register operation While reading the content of data registers starting from Sa will be overwritten by the content of file registers addressed by the base file register Sb and record pointer Pr while writing the content of file registers addressed by the base file register Sb and record pointer Pr w...

Page 289: ...e L 0 or 511 or the operation out of the file register s range F0 F8191 EN 160 RWFR ERR M10 M0 R W INC L Pr Sa Sb D0 R0 F100 50 M0 EN Sa R0 160 RWFR Sb F100 L Pr R W INC ERR 50 D0 M10 When M0 changes from 0Æ1 if D0 2 the contents of file registers F200 F249 will be overwritten by the content of data registers R0 R49 the record length is 50 Pointer will be increased by 1 after operation When M0 cha...

Page 290: ...OR DR K XR Range Operand R0 R383 9 R5000 R8071 D0 D4095 16 32 bit Integer V Z P0 P9 S D Description z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When conversion control EN 1 or EN P instruction has a transition from 0 to 1 will convert the integer data from S register into D D 1...

Page 291: ...V Z P0 P9 S D Description z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When conversion control EN 1 or EN P instruction has a transition from 0 to 1 will convert the floating point data from S S 1 32bits register into D register integer data z If the value exceeds the valid rang...

Page 292: ...ription z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z Performs the addition of the data specified at Sa and Sb and writes the results to a specified register D when the add control input EN 1 or EN P instruction from 0 to 1 If the result exceed the range that the floating point n...

Page 293: ...scription z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z Performs the subtraction of the data specified at Sa and Sb and writes the results to a specified register D when the subtract control input EN 1 or EN P instruction from 0 to 1 If the result exceed the range that the floati...

Page 294: ... IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z Performs the multiplication of the data specified at Sa and Sb and writes the results to a specified register D when the multiplication control input EN 1 or EN P instruction from 0 to 1 If the result exceed the range that the floating point number can be expressed 3 4 10 3 8 then the error flag...

Page 295: ... z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z Performs the division of the data specified at Sa and Sb and writes the result to the registers specified by register D when the division control input EN 1 or EN P instruction from 0 to 1 If the result exceed the range that the floa...

Page 296: ...ng System page 5 9 z Compares the data of Sa and Sb when the compare control input EN 1 or EN P instruction from 0 to 1 If the data of Sa is equal to Sb then set FO0 to 1 If the data of Sa Sb then set FO1 to 1 If the data of Sa Sb then set FO2 to 1 If the data of Sa Sb then set the FO2 to 1 X0 EN Sa Sb a b Y0 a b a b 206P FCMP R0 R2 z From the above example we first assume the data of DR0 is 200 1...

Page 297: ... SL S SU then set the inside zone flag INZ to 1 If the value of S is greater than the upper limit SU then set the higher than upper limit flag S U to 1 If the value of S is smaller then the lower limit SL then set the lower than lower limit flag S L as 1 z The upper limit SU should be greater than the lower limit SL If SU SL then the limit value error flag ERR will set to 1 and this instruction wi...

Page 298: ...Advanced Function Instruction 7 134 FUN 207 P FZCP FLOATING POINT NUMBER ZONE COMPARE FUN 207 P FZCP X0 Æ FLOATING ZONE COMPARE Æ Y0 1 Results of execution ...

Page 299: ... number V Z P0 P9 S D Description z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When operation control EN 1 or EN P instruction from 0 to 1 take the square root of the data specified by the S value or S S 1 register and store the result into the register specified by D D 1 z If t...

Page 300: ...ndard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When operation control EN 1 or EN P instruction from 0 to 1 take the SIN value of the angle data specified by the S register and store the result into the register D D 1 in floating point number format The valid range of the angle is from 18000 to 18000 unit in 0 01 degree z If the S value is not within the ...

Page 301: ...andard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When operation control EN 1 or EN P instruction from 0 to 1 take the COS value of the angle data specified by the S register and store the result into the register D D 1 in floating point number format The valid range of the angle is from 18000 to 18000 unit in 0 01 degree z If the S value is not within the...

Page 302: ...tandard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When operation control EN 1 or EN P instruction from 0 to 1 take the COS value of the angle data specified by the S register and store the result into the register D D 1 in floating point number format The valid range of the angle is from 18000 to 18000 unit in 0 01 degree z If the S value is not within th...

Page 303: ...095 Integer 16 Bit number V Z P0 P9 D Description z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When operation control EN 1 or EN P instruction from 0 to 1 the sign of the floating point number register specified by D will be toogled EN X0 212P FNEG R0 z The instruction at left n...

Page 304: ...P0 P9 D Description z The format of floating point number of Fatek PLC follows the IEEE 754 standard For detail explanation of the format please refer to 5 3 Numbering System page 5 9 z When operation control EN 1 or EN P instruction from 0 to 1 calculate the absolute value of the floating point number register specified by D and write it back into the original D register R0 X0 EN 213P FABS z The ...

Page 305: ...MEMO ...

Page 306: ...be able to understand the machine operations thoroughly so that design operation and maintenance will become more effective and simpler 8 1 The Operation Principle of Step Ladder Diagram Example Description Y1 Y3 Y0 Y4 Y5 M1924 X1 X3 X4 X2 Y2 X5 X6 X10 STP S20 STP S22 STP S23 STP S21 STP S0 1 STP Sxxx is the symbol representing a step Sxxx that can be one of S0 S999 When executing the step status ...

Page 307: ...z A divergence may have up to 8 paths maximum z X1 X2 X22 can all be replaced by the serial or parallel combination of other contacts e Simultaneous divergence convergence STP S21 STP S30 STP S40 STP S20 STP S22 STP S31 STP S23 STP S32 X1 X0 Simultaneous divergence Simultaneous convergence z After X0 is ON step S20 will simultaneously execute all paths below it i e all S21 S22 S23 and so on are in...

Page 308: ... S23 to execute without going through the process of selective convergence z The execution of simultaneous divergent paths can not be skipped b Different step loop M1924 X0 X2 X3 STP S20 STP S21 X4 S30 X10 STP S7 X11 X1 X3 STP S30 STP S31 X12 S21 STP S0 gClosed Loop and Single Cycle a Closed Loop M1924 STP S1 STP S20 STP S22 X0 X1 X2 STP S21 z The initial step S1 is ON endless cycle will be contin...

Page 309: ...on will let S21 OFF which will stop the whole step process c Mixed Process M1924 STP S0 X4 X3 X2 X0 X1 STP S20 STP S21 STP S24 X7 X5 STP S22 STP S23 X6 STP S25 RST S25 h Combined Application A branch can have up to 8 branch loops 1 2 3 4 5 6 7 8 16 The maximum number of downward horizontal branch loops of an initial step is 16 ...

Page 310: ...ess can operate independently or generate results for the reference of other processes Example 1 Go to the initial step S0 after each start ON WinProladder FP 07 M1924 STP S0 M1924 STP S0 TO S0 ORG TO STP M1924 S0 S0 Example 2 Each time the device is start to run or the manual button is pressed or the device is malfunction then the device automatically enters the initial step S0 to standby WinProl...

Page 311: ...D OUT LD AND OUT FROM AND TO STPEND M1924 S0 S0 Y0 S0 X10 S20 S20 TR0 X1 Y1 TR0 X2 Y2 S20 X11 S0 Description 1 When ON the initial step S0 is ON and Y0 is ON 2 When transfer condition X10 is ON in actual application the transferring condition may be formed by the serial or parallel combination of the contacts X Y M T and C the step S20 is activated The system will automatically turn S0 OFF in the ...

Page 312: ... X8 STP S20 STP S23 X0 Y1 X4 S0 Y2 X2 STP S21 X6 X3 STP S22 Y3 M1924 STP S0 Y1 Y0 Y2 STPEND X1 STP S20 X2 X3 X0 STP S21 X4 Y3 STP S22 X7 X5 X6 Y4 X8 TO S20 TO S21 TO S22 TO S0 TO S0 TO S23 TO S0 FROM S22 FROM S20 STP S23 ORG TO STP AND OUT FROM OUT TR AND TO LD TR AND TO LD TR AND TO STP OUT STP OUT FROM AND TO STP OUT FROM AND FROM AND ORLD AND TO STP OUT FROM AND TO STPEND M1924 S0 S0 X0 Y0 S0 0...

Page 313: ...N first and either S21 or S22 will not be ON e if X2 and X3 are ON at the same time then step S21 will have the priority to be ON first and S22 will not be ON 3 When S20 is ON if X5 and X7 are ON at the same time then step S23 will be ON Y4 will be ON and S20 and Y1 will be OFF 4 When S21 is ON if X4 is ON then step S0 will be ON and S21 and Y2 will be OFF 5 When S22 is ON if X6 and X7 are ON at t...

Page 314: ...24 S0 S0 X0 Y0 S0 X1 S20 S21 S20 Y1 S21 Y2 S21 X2 S22 S22 Y3 S20 S22 X3 S23 S23 X4 Y4 S23 X5 S0 Description 1 When ON the initial step S0 is ON If X0 is ON then Y0 will be ON 2 When S0 is ON if X1 is ON then steps S20 and S21 will be ON simultaneously and Y1 and Y2 will also be ON 3 When S21 is ON if X2 is ON then step S22 will be ON Y3 will be ON and S21 and Y2 will be OFF 4 When S20 and S22 are ...

Page 315: ...cesses S0 S7 and is able to control them simultaneously Therefore up to 8 STPEND instructions can be obtained Example WinProladder FP 07 M1924 STPEND M1924 STPEND STPEND M1924 STP S1 STP S0 STP S7 M1924 STPEND STP S0 TO S0 STPEND M1924 M1924 STPEND TO S1 STP S1 TO S7 STP S7 ORG TO STP STPEND ORG TO STP STPEND ORG TO STP STPEND M1924 S0 S0 M1924 S1 S1 M1924 S7 S7 Description When ON the 8 step proc...

Page 316: ...be used if it is required to continue the machine process after power is off Basically a step must consists of three parts which are control output transition conditions and transition targets MC and SKP instructions cannot be used in a step program and the sub programs It s recommended that JMP instruction should be avoided as much as possible If the output point is required to stay ON after the ...

Page 317: ...T FROM AND TO S22 X11 Y3 S22 X8 S0 Y1 Y0 M1924 STP S0 X5 X2 STP S20 X0 X3 S0 X1 X6 Y2 X4 STP S21 X8 X7 Y3 X11 STP S22 M1924 STP S0 Y1 Y0 Y2 STPEND STP S20 X2 X3 X0 STP S21 X4 X7 X5 X6 Y3 STP S22 X8 TO S20 TO S0 TO S21 TO S0 TO S22 TO S0 FROM S20 X1 X11 FROM S21 Net6 STPEND Description 1 Input the condition to initial step S0 2 Input the S0 and the divergent conditions of S20 S0 and S21 3 Input the...

Page 318: ...M AND TO S23 X11 Y4 S23 X8 S0 Y1 Y0 M1924 STP S0 X2 STP S20 X0 X1 X4 X6 X7 X11 STP S21 X5 STP S23 X8 Y2 STP S22 X3 Y3 Y4 M1924 STP S0 Y1 Y0 Y2 STPEND STP S20 X2 X3 X0 STP S21 X4 X7 X5 X6 Y3 STP S22 X8 TO S20 TO S22 TO S21 TO S0 TO S23 TO S0 FROM S22 FROM S21 X1 X11 Y4 STP S23 Net7 STPEND Description 1 Input the condition to initial step S0 2 Input the S0 and the divergent condition of S20 and S22 ...

Page 319: ...0 Y1 Y3 STP S22 STP S21 Y2 STP S23 X5 X3 Y4 X2 X7 X4 X6 STP S24 Y5 M1924 STP S0 Y1 Y0 Y2 STPEND X1 STP S20 X2 STP S21 Y3 STP S22 X3 Y4 STP S23 X5 TO S20 TO S24 TO S21 TO S0 TO S23 FROM S22 FROM S21 X4 TO S22 Y5 STP S24 X7 TO S0 FROM S24 FROM S23 X6 Net9 STPEND Description 1 Input the condition to initial step S0 2 Input the S0 and the divergences of S20 and S24 3 Input the S20 4 Input the S20 and ...

Page 320: ...Limit 1S Delaly Upper Limit Right Limit Lower Limit 1S Delay Upper Limit Left Limit Return to the origin claw released at the left limit and the upper limit Arm stretches downward Stop stretching downward Claw grasps after 1S Arm lifts up Stop moving to the right Arm stretches downwards Stop lifting up Move arm to the right Stop stretching downwards Release claw after 1S Arm lifts up Stop lift up ...

Page 321: ...ng the upper limit Move arm to the right Divergent into S24 after moving to the right limit Stretch the arm downward Divergent into S25 after stretching to the lower limit Release claw Delay for 1S Transfer into S26 after 1S Lift the arm up Divergent into S27 after reaching the upper limit Move the arm to the left Divergent into S0 after moving to the left limit a complete cycle ORG TO STP OUT TR ...

Page 322: ...s Empty limit switch X1 No liquid limit switch X2 Empty limit switch X3 Over load switch X4 Warning clear button X5 Start button X6 Water washing button X7 Warning Indicators Empty dried material Y1 Insufficient liquid Y2 Empty stirring unit Y3 Motor over load Y4 Output Points Dried material inlet valve Y5 Dried material inlet valve Y6 Liquid inlet valve Y7 Motor start electromagnetic valve Y8 Cle...

Page 323: ...FO 1 FROM S25 OUT M1 AND NOT X3 FROM S20 TO S0 LD M0 STPEND OR M1 ANDLD TO S21 TO S22 STP S21 OUT Y6 M1924 STP S0 STPEND STP S21 X3 M0 TO S20 TO S0 TO S21 STP S20 X2 X1 SET Y1 SET Y2 SET Y3 X5 X4 SET Y4 RST Y1 RST Y2 RST Y3 RST Y4 Y4 Y3 Y2 Y1 X6 TO S24 Y4 Y3 Y5 M0 Sb R0 Sa R3840 17CMP M1 M1 TO S22 Y6 EN T0 500 STP S22 Y7 EN T1 800 FROM S21 TO S23 T0 T1 FROM S22 STP S23 Y8 EN T2 4500 Y4 X4 STP S24 ...

Page 324: ... Y4 Green X0 X1 Input Points Pedestrian Push Button X0 Pedestrian Push Button X1 Output Points Road Red Light Y0 Road Amber light Y1 Road Green Light Y2 Pedestrian Crossing Red Light Y3 Pedestrian Crossing Green Light Y4 M1918 0 Y3 Red Y4 Green X1 Y0 Red Y1 Amber Y2 Green Y4 Green X0 ...

Page 325: ... S31 STP S32 T3 T2 Y3 Y4 T3 2000 T4 100 Road Green Light Road Amber Light Road Red Light T4 STP S33 Y4 PV 6 C1 S33 C1 T5 STP S34 Y3 RST C1 T6 100 Road Green Light Pedestrian Push Button Pedestrian Crossing Light Pedestrian Crossing Red Light Pedestrian Crossing Green Light Pedestrian Crossing Green Light BLink C1 T5 S32 Pedestrian Crossing Red Light T5 100 ...

Page 326: ...1 500 S21 T1 S22 AND TO LD TR AND AND TO T5 S32 1 C1 T5 S34 STP OUT T2 PV S22 Y0 500 STP OUT RST S34 Y3 C1 STP S30 T6 PV 100 OUT FROM AND TO Y3 S30 T2 S31 FROM FROM AND TO S22 S34 T6 S0 TO S30 EN T0 3000 T1 TO S22 STP S21 Y1 EN T1 500 STP S22 Y0 EN T2 500 T2 TO S31 T3 TO S32 STP S31 Y4 EN T3 2000 STP S32 T4 TO S33 EN T4 100 C1 TO S32 STP S33 Y4 PV 6 C1 C1 TO S34 S33 EN T5 100 T5 T5 EN T6 100 M1924...

Page 327: ...sxx instruction E74 Duplicated FROM sxx instruction E76 STP S0 S7 without a matched STPEND or STPEND without a matched STP S0 S7 E78 TO S20 S999 STP S20 S999 or FROM instructions comes before or without STP S0 S19 E79 STP Sxx or FROM Sxx instructions comes before or without TO Sxx E80 FROM Sxx instruction comes before or without STP Sxx E81 The max level of branches must 16 E82 The max no of branc...

Page 328: ...isplay current Year Month Date Hour and minute data Setting Set Year Month Date Hour and minute data Status Display Function Discrete Element Display the state and enable disable status of X Y M S element 16 bit Register Display the current value of T C D R F register Three display formats unsigned signed hexadecimal can be chosen 32 bit Register Display the current value of C D R F register Three...

Page 329: ...e nine element types can be chosen those are T C D R F X Y M and S Reference number or year display The sequence number of the selected element or the year part of the calendar Value display or hour and minute display For 16 bit register it represents the current value of 16 bit content For 32 bit register it represents the portion of the number above 5t h digit million in decimal or MSB word in h...

Page 330: ...hift right Å Å key shift left Default display mode Calendar Display 1 Select the field to be changed selected field will be blinked 2 Enter the new value 3 Enter status monitoring display screen 4 Use Å key Æ key select the element type to be monitoring The selected type will be blinked 5 Under calendar display mode press key to force PLC stop or run ...

Page 331: ... time The upper row is on off status while the lower row is disable enable status 2 Element reference number adjust key Increase the reference number by 5 key Decrease the reference number by 5 3 Enter the element status editing state The selected point will be blinked 4 Modification of element ON OFF Enable Disable status key Change the ON OFF status toggle operation key Change the Enable Disable...

Page 332: ...igit to be changed will be blinked 4 Modify value key Increased by one key Decreased by one Æ key Move to the right digit Å key Move to the left digit 5 Finish the editing and increase the reference number by one and back to 1 When monitoring the counter element if the reference number is great than 200 then the display value will be in 32 bit format C200 C255 are 32bit counter When monitoring the...

Page 333: ...number by one when 16 bit display format by two when in 32 bit display format Æ key Display format selection There are signed decimal unsigned decimal and hexadecimal display format can be selected Each depression of Æ key can change the format once 16 bit hexadecimal display 16 bit signed decimal display Å key 16 bit 32 bit display format selection Each depression of Å key will toggle the display...

Page 334: ...digit to be edited will be blinked 4 Modify digit value key Increased by one key Decreased by one Æ key Move cursor to the right digit Å key Move cursor to the left digit 5 Finish the editing and automatically point to the next available reference number then back to 1 ...

Page 335: ...Com Port connected port 0 port 0 1 2 In which port 0 and 1 needed to be converted as RS 485 General feature Timing counting register contact access write protected for each Special feature Alarm message display self definition of special speed keys Card writing feature Order for machine types with special numbers to us is required PLC s MA MU type machines can be connected to FB DAP B R only throu...

Page 336: ...e FB DAPB R can be connected to PLC port0 HCMOS PLC port1 RS 232 4 When PLC is connected with FB DAP B R the service point numbers of PLC are limited to a range of 1 32 5 Parameters for the connection between PLC and FB DAP B R DAP automatic detection Baud Rate 9600 19200 38400 port0 1 2 9600 19200 38400 Even 7Data bits 1Stop bit ex R4158 5521H i e port2 being 9600 R4158 5523H i e port2 being 3840...

Page 337: ...ions it can also be used as write protect with T C R D X Y M S There are two measures to monitor information ADR general addresses and DOC monitoring The latter shall make DOC compilation 16 words in English symbols numbers in advance through Proladder or FP07 for T C register R D and contacts so the DOC can be displayed 1 ADR Monitoring A Timer and Counter Monitoring Pressing Keys or number T or ...

Page 338: ... means to display a value either with decimal or hexadecimal system 2 DOC monitoring DOC of T10 Current value Contact status Register DOC Value Note 1 Pressing can switch the monitoring of ADR and DOC 2 The display switch between CV current value and PV of the timer counter can use 3 or can be moved up or down to next monitored item with DOC 3 Speed monitoring FUN keys FUN KEY 0 9 totaling 10 keys...

Page 339: ...ENTER SOFTKEY MODE 16 KEY 7 DEFINE SOFTKEY MODE 8 KEY 8 DEFINE SOFTKEY 16 KEY 6 DEFINE SOFTKEY 8 KEY 5 DEFINE ALARM ADDRESS 3 PASSWORD SET 4 DEFINE FUN KEY 2 PASSWORD CLOSE 1 PASSWORD OPEN Indicates when multiple DAPs are connected each DAP can be set respectively Indicates when multiple DAPs are connected the information set by one of them is not available for use until PLC is reset Exit of FUN f...

Page 340: ...als for display are shown as follows Corresponding list for control Alarm level priority sequence Control contact Indication register Start address of the content displayed ALARM 0 M1900 R3820 Client defined ALARM 1 M1901 R3821 Client defined ALARM 9 M1909 R3829 Client defined Example Assume the start address of ALARM 0 displayed content to be R100 If M1900 1 then the alarm address for display is ...

Page 341: ...tion Note 3 To return to normal operation mode press D2972 content among which D2972 content is from 0000 9999 4 digits required z FUN 8 DEFINE SOFTKEY 16 KEYS Self define 16 soft keys FUN 9 ENTER SOFTKEY MODE 16 KEYS Enter 16 soft key mode 1 Available for defining 16 soft keys 2 Definable range T0 T255 C0 C199 R0 R3839 D0 D2943 M0 M1899 3 In defining M0 M1899 this key can be defined as one of the...

Page 342: ...han this number on the Web appropriately will decrease time for information to update z FUN 13 WRITE PROTECT Information write in Aimed for monitored items T C R D Y M S set the information in write in protection separately Just fill in the corresponding place with 1 and then the item is write in protected and can be read values only z FUN 14 RF CARD MODE Wireless card reading options z MODE 0 Ö W...

Page 343: ...578 M1579 M1580 M1581 M1582 M1583 M1584 M1585 M1586 M1587 M1588 M1589 M1590 M1591 15 M1560 M1561 M1562 M1563 M1564 M1565 M1566 M1567 M1568 M1569 M1570 M1571 M1572 M1573 M1574 M1575 16 M1544 M1545 M1546 M1547 M1548 M1549 M1550 M1551 M1552 M1553 M1554 M1555 M1556 M1557 M1558 M1559 In 8KEYS MODE only 8 keys are effective i e number keys ineffective And take the positions of and but it must be when bo...

Page 344: ...be difficult for PLC to identify the information correctly 5 Preset D2860 D2939 16 differently located DAP take on 5 registers individually i e 80 registers in all but the locations can be changed through function 15 control one point of M1880 M1895 separately when in use Card number format Card number format Card number format Card number format D2860 N1 N2 D2865 N1 N2 D2870 N1 N2 D2935 N1 N2 D28...

Page 345: ...display different messages The following is a list of corresponding special contacts and indication registers when each DAP is displaying a message for control LCD line 1 LCD line 2 Number of a message displayed Special contact Indication register Special contact Indication register 1 16 M1800 R3780 M1801 R3781 1 M1802 R3782 M1803 R3783 2 M1804 R3784 M1805 R3785 3 M1806 R3786 M1807 R3787 4 M1808 R...

Page 346: ...rks is used to indicate the register address number storing the variable information and in what format and carry code to display z Total variable count displayed In this case the value including minus of the variable R0 is displayed in a field with 8 digits If the variable value is bigger than the total variable count displayed the digits further from the point will be cut If not enough blank spa...

Page 347: ...an have a repeatable arrangement of any place in ASCII but the same command cannot be connected together Example Information edited with WinProladder ASCII file editor R0 is a start register of an ASCII file and the file information is shown as follows 5S 20P A 6 2R3840 B 6 2R3841 30P C 1M0B D 1M1B E 1M2B END If M1800 from 0 1 and R3780 0 i e R0 Line 1 of the LCD of DAPs of all numbers is shown as...

Page 348: ...MEMO ...

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