Advanced Function Instruction
7 -1 3
FUN 36
D
P
XNR
EXCLUSIVE NOR
FUN 36
D
P
XNR
Sa :
D :
EN
Operation control
Ladder symbol
36DP.XNR
Sb :
D=0
Result as 0
Sa : Data a for XNR operation
Sb : Data b for XNR operation
D : Register storing XNR results
Sa, Sb, D may combine with V, Z, P0~P9 to serve
indirect address application
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
K
XR
Range
Ope-
rand
WX0
∣
WX240
WY0
∣
WY240
WM0
∣
WM1896
WS0
∣
WS984
T0
∣
T255
C0
∣
C255
R0
∣
R3839
R3840
∣
R3903
R3904
∣
R3967
R3968
∣
R4167
R5000
∣
R8071
D0
∣
D4095
16/32-bit
±
number
V
、
Z
P0~P9
Sa
○
○
○
○
○
○
○
○
○
○
○
○
○
○
Sb
○
○
○
○
○
○
○
○
○
○
○
○
○
○
D
○
○
○
○
○
○
○
○
*
○
*
○
○
●
When operation control "EN" = 1 or "EN
↑
" (
P
instruction) changes from 0 to 1, will perform the logical
XNR (inclusive or) operation of data Sa and Sb. The operation of this function is to compare the
corresponding bits of Sa and Sb (B0~B15 or B1~B31), and if the bit has the same value, then set the
corresponding bit within D as 1. If not then set it to 0.
●
After the operation, if the bits in D are all 0, then set the 0 flag "D=0" to 1.
X0
EN
Sa :
Sb :
D :
R 0
R 2
36P.XNR
D=0
R 1
z
The instruction at left makes a logical XNR operation
of the R0 and R1 registers, and the results are stored
in the R2 register.
Sa
R0 1 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1
Sb
R1 1 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0
Ø
X0
=
D
R2 1 0 1 0 1 0 1 0 0 0 1 1 0 1 0 0