User Manual
DIC324
Warning!
Interrupt signal reset will be carried out only after reset of the relevant bits in the
register of events.
Reset of bits prohibits generation of interrupts.
Register of inputs
is available
by reading via
byte ports with addresses
BA+1, BA+2
:
Table 3-10: Register of
inputs
Address
D7
D6
D5
D4
D3
D2
D1
D0
BA + 1
ST7
ST6
ST5
ST4
ST3
ST2
ST1
ST0
BA + 2
ST15
ST14
ST13
ST12
ST11
ST10
ST9
ST8
ST[15:0]
Status bits of inputs. Bits of register reflect the state of the relevant input
(IN15.IN0) with the delay for the period of de- bouncing.
Register of events
is available
by reading via
byte ports with addresses
BA+3, BA+4
and has the format:
Table 3-11: Register of events
Address
D7
D6
D5
D4
D3
D2
D1
D0
BA + 3
EV7
EV6
EV5
EV4
EV3
EV2
EV1
EV0
BA + 4
EV15
EV14
EV13
EV12
EV11
EV10
EV9
EV8
EV[15:0]
Register of events Register bits are set when the status of the relevant input
IN[15:0] is changed ( edge of events is defined by bits
FR[1:0]
X
).
Warning!
Only one event per each input will be stored. For registration
of the next event you will have to reset the relevant bit of the register of events
(
writing 1
to the bit, where the event occurred).
Frequency meter
F
has two registers:
control register and data register.
Control
register
is available
via
byte
ports
with
addresses
BA+7..BA+9
and has the format:
Table 3-10: Register of inputs
Only one event per each input will be stored. For registration
of the next event you will have to reset the relevant bit of the register of
events
(writing 1
to the bit, where the event occurred).
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