ETAS
Technical Data
FETK-S2.1 - User’s Guide
40
7.8.2.2
JTAG Mode (3.3 V Interface selected)
7.8.2.3
LFAST Mode
Signal
Pin Type
V
OL
(max)
[V]
V
OH
(min) [V]
V
OH
(max)
[V]
V
IL
(max)
[V]
V
IH
(min) [V]
V
IH
(max) [V]
Leakage cur
rent
[
A]
Addi
tional
L
oad
by
ET
K
(t
yp
) [
pF]
1)
TCK
XO
2)
0.7
2.4
3.45 -
-
6.5
+730/
+470
15
TMS
XO
2)
0.7
2.4
3.45 -
-
6.5
+60/
-60
25
TDO
I
-
-
-
0.8
2
6.5
+50/
-50
27
TDI
XO
2)
0.7
2.4
3.45 -
-
6.5
+40/
-40
21
/TRST
XO
2)
0.7
2.4
3.45 -
-
6.5
+40/
-40
23
/ESR0
IXOD
3)
0.7
-
-
0.8
2
6.5
+25/
-20
15
/PORST
IXOD
3)
0.7
-
-
0.8
2
6.5
+25/
-20
15
WDGDIS
XO
2)
0.7
2.4
3.45 -
-
6.5
+10/
-10
10
1)
Adapter cable and Samtec connector not considered; PCB 1 pF/cm
2)
I
Dmax
= 12 mA
3)
Open Drain FET; I
Dmax
= 0.2 A
I: Input
X: Tristate
O: Output
OD: Open Drain
Signal
Pin Type
V
IL
(max) [V]
V
IH
(min
)
[V]
V
IH
(max)
[V]
V
ID
(min)
[mV]
V
ID
(max) [mV]
V
OD
(min) [mV
]
V
OD
(max) [mV]
Addi
tional
Load
by
E
T
K
(typ
) [p
F]
1)
DRCLK
I
0.8
2
6.5
-
-
-
-
15
TXD+/-
I
-
-
-
50
1000
-
-
10
RXD+/-
XO
-
-
-
-
-
400
550
-
1)
Adapter cable and Samtec connector not considered; PCB 1 pF/cm
I: Input
X: Tristate
O: Output
