10
EPSON
S1C63666 TECHNICAL MANUAL
CHAPTER 2: POWER SUPPLY AND INITIAL RESET
2.1.1 Voltage regulator for OSC1 oscillation circuit
This voltage regulator generates the V
OSC
voltage (0.98 V Typ.) for driving the OSC1 oscillation circuit.
This regulator always operates to drive the OSC1 oscillation circuit.
2.1.2 Low-speed operation voltage regulator
The low-speed operation voltage regulator generates the V
D1L
voltage (1.25 V Typ.) for driving the
internal logic circuits in low-speed mode. This regulator always operates and the output voltage is used
as the operating voltage of the CPU and internal logic circuits when they are driven with the OSC1 clock
(32 kHz).
2.1.3 High-speed operation voltage regulator
The high-speed operation voltage regulator generates the V
D3
voltage (2.0 V Typ.) for driving the OSC3
oscillation circuit and the internal logic circuits in high-speed mode. Since this regulator stops normally, it
should be turned it on using software before switching to the high-speed mode. Refer to Section 4.4,
"Oscillation Circuit", for the control method.
2.1.4 Internal operating voltage V
D1
The internal operating voltage V
D1
is the voltage for driving the CPU and internal logic circuits.
The S1C63666 is designed with twin clock specifications; it has two types of oscillation circuits OSC1 and
OSC3 built-in. Use OSC1 clock for normal operation, and switch to OSC3 using software when high-
speed operation is necessary. When switching the clock, the operating voltage V
D1
must be switched
using software to stabilize the operation of the oscillation circuit and internal circuits.
In low-speed operation, V
D1L
generated by the low-speed operation voltage regulator is used as V
D1
. In
high-speed operation, V
D3
generated by the high-speed operation voltage regulator is used as V
D1
.
Refer to Section 4.4, "Oscillation Circuit", for the control method.
2.1.5 LCD system voltage circuit
The LCD system voltage circuit generates the LCD drive voltage. This circuit allows the software to turn
on and off. Turn this circuit on before starting display on the LCD. The LCD system voltage circuit
generates V
C1
with the voltage regulator built-in, and generates two other voltages (V
C2
= 2V
C1
, V
C3
=
3V
C1
) by boosting V
C1
. The V
C1
voltage value can be adjusted using software in 16 steps (0.95 to 1.40 V).
The LCD system voltage regulator can be disabled by mask option. In this case, external elements can be
minimized because the external capacitors for the LCD system voltage regulator are not necessary.
However when the LCD system voltage regulator is not used, the display quality of the LCD panel, when
the supply voltage fluctuates (drops), is inferior to when the LCD system voltage regulator is used.
Figure 2.1.5.1 shows the external element configuration when the LCD system voltage regulator is not
used.
