S1C17 CORE MANUAL
Seiko Epson Corporation
7-55
(Rev. 1.2)
(2) Standard (example of post-increment option)
ld %rd,[%rb]- ; source memory address = rb
; post decrement: rb - imm13
The 16-bit data in the specified memory location is transferred to the
rd
register. The
rb
register
contains the memory address to be accessed. The eight high-order bits of the
rd
register are set
to 0. The memory address will be incremented by two bytes after the data transfer has finished.
(3) Extension 1 (example of post-decrement option)
ext imm13
ld %rd,[%rb]- ; source memory address = rb
; post decrement: rb - imm13
The 16-bit data in the specified memory location is transferred to the
rd
register. The
rb
register
contains the memory address to be accessed. The eight high-order bits of the
rd
register are
set to 0. The memory address will be decremented by
imm13
bytes after the data transfer has
finished.
(4) Extension 2 (example of pre-decrement option)
ext imm11 ;
imm11(10:0) = imm24(23:13)
ext imm13
; = imm24(12:0)
ld %rd,-[%rb] ; source memory address = rb - imm24
After the memory address specified by the
rb
register is decremented by
imm24
bytes, the 16-
bit data in the decremented address is transferred to the
rd
register. The eight high-order bits of
the rd register are set to 0.
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the “d” bit. In this case, extension of the immediate by the
ext
instruction cannot be performed.
Caution
The
rb
register and the immediate value must specify a 16-bit boundary address (least significant
bit = 0). Specifying an odd address causes an address misaligned interrupt. Note, however, that the
data transfer is performed by setting the least significant bit of the address to 0.
