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ISL55180 EVM Getting Started               

 

 

 

       

    Rev A04: 11/28/2012 

 

Copyright 

 Elevate Semiconductor Corporation 2012 

Page 12 of 20 

2.3.3  Channel#0 and Channel#1 Ganging (Merging) Configuration 

Figure 4 illustrates the recommended configuration for the ganging application.   Channel#0 is configured 
in FV mode in Remote Sense while Channel#1 is configured in FI (Slave) mode.  Both Channel#0 and 
Channel#1 FORCE pins are connected to the TEST_NODE SMA.  Channel#0 SENSE is also connected 
to TEST_NODE which provides the remote Kelvin Sense return path.    
 
The MI_MONITOR is configured to output the Channel#0 MI-S.  The MONITOR is configured to output 
the Channel#1 MI-S.   
 
Channels 2-7 are configured in FV/MI mode. 
 

Figure 4:  ISL55180 EVM Ganging Configuration Simplified Block Diagram 

Motherboard

Europa 
Load Board

PC

J2

 (FVMI

)

Parallel

Cable

EVM

Power

Supply

ISL55180

DMM

or

SMU

MONITOR (Ch1)

MONITOR

FORCE_0

SENSE_0

FORCE_0

VCCO

VEE

+20V (BN1)

-15V (BN2)

+5V (BN3)

GND (BN4)

LEDs

SENSE_0

TEST_NODE

Europa

Power

Supply

MI_MONITOR (Ch0)

MI_MONITOR

FORCE_1

SENSE_1

FORCE_1

SENSE_1

GND

 

 

Summary of Contents for ISL55180 EVM

Page 1: ...yright Elevate Semiconductor Corporation 2012 Page 1 of 20 ISL55180 EVM Getting Started Rev A04 11 28 2012 This document contains information on a product under development The parametric information contains target parameters that are subject to change ...

Page 2: ... 1 3 4 Launching the Elevate Semiconductor Program 6 1 3 5 Software Un Installation 6 2 Getting Started 7 2 1 Caution 7 2 2 Quick Start Instructions 7 2 2 1 Default Power Supply Option 7 2 2 2 Switching Regulator Supply Option 9 2 3 Default Configuration Setup Options 10 2 3 1 Remote Kelvin Sense 10 2 3 2 FV MI Configuration 11 2 3 3 Channel 0 and Channel 1 Ganging Merging Configuration 12 2 4 Mot...

Page 3: ...0 Configuration Dialog Box 16 Figure 7 ISL55180 DC Levels Dialog Box 16 Figure 8 ISL55180 DAC Configuration Dialog Box 17 Figure 9 ISL55180 Central Register Dialog Box 17 Figure 10 ISL55180 EVM Detailed Block Diagram 18 Figure 11 Controller Section Detailed Block Diagram 19 List of Tables Table 1 ISL55180 EVM Contents 4 Table 2 Power Supply Requirements 5 Table 3 ISL55180 Default Configuration Opt...

Page 4: ...es the instructions to install setup and operate the ISL55180 EVM Refer to the Elevate Semiconductor EVM User s Guide for a detailed description of the EVM system 1 1 Unpacking ISL55180 EVM Contents Please check the contents of the ISL55180 EVM shipping carton to make sure you have received all of the items listed in Table 1 The system is already configured for the best setup except for connection...

Page 5: ... software Table 2 Power Supply Requirements Module Supply Current Rating Motherboard 20V 0 5 A Motherboard 5V 1 0 5 A Motherboard 15V 0 5 A ISL55180 VCCO 5V 2 3 2 0 A 4 ISL55180 VEE 3V 2 3 2 0 A 4 Notes 1 The EVM 5V could also be used as the ISL55180 VCCO 2 Once the EVM operation is verified the customer can adjust the VCCO VEE supplies 3 Make sure the external supplies do not violate the ABS max ...

Page 6: ... a short cut will be installed onto the desktop and in the Start Programs folder The Start Programs folder also contains links to the different product datasheets EVM User s Guide and documentation folder 1 3 2 Parallel Port ParPort2K Installation To install the ParPort2K parallel port driver run the setup exe from the ParPort2k sub directory after the main installation is complete and click the I...

Page 7: ...nnect the power supplies cables not provided from the power supply to the Elevate Semiconductor EVM Motherboard and ISL55180 loadboard refer to Figure 3 3 Connect the parallel cable provided from the PC to J2 on the Octal FVMI board 4 Connect the EVM to any external equipment refer to Section 2 3 5 Setup Motherboard Jumpers refer to Section 2 4 6 Ensure Jumpers E4 and E5 are installed on the loadb...

Page 8: ...012 Page 8 of 20 Figure 2 Expected Current Readings The Reset System will put the EVM and ISL55180 device into the default state The Reset System should be issued whenever the power supply is powered OFF then ON The Reset System is automatically performed when the program is initially launched ...

Page 9: ...rting pins 1 and 2 towards back of board 8 Set external power supply voltages and current limits VCCO must be at least 9V to enable the Switching Regulator 9 Enable external power supply 10 Run the Elevate Semiconductor GUI software refer to Section 1 3 4 for details 11 At the Force Voltage Measure Current dialog box refer to Figure 2 above a Select the EVM Setup option based on the desired config...

Page 10: ... I Clamps disabled VFA 3 0V IR5 Sel FB SENSE Con FS 1 Ch 0 FORCE and SENSE connected to TEST_NODE Ch 0 1 Ganging 2 3 3 All Channels except Ch 1 configured in FV MI mode with I Clamps disabled Ch 1 configured into FI Slave mode Ch 0 VFA 3 0V IR5 Sel FB SENSE Con FS 1 Ch 0 FORCE and SENSE connected to TEST_NODE Ch 1 FORCE connected to TEST_NODE 2 3 1 Remote Kelvin Sense Caution should be used when c...

Page 11: ...o connect other channels to the TEST_NODE Both MI_MONITOR and MONITOR are configured to output Channel 0 MI S If using an external source measurement unit SMU the SMU should be configured in the opposite mode as ISL55180 ISL55180 SMU FV MI FI MV FI MV FV MI Figure 3 ISL55180 EVM FV MI Simplified Block Diagram Motherboard Europa Load Board PC J2 FVMI Parallel Cable EVM Power Supply ISL55180 DMM or ...

Page 12: ...T_NODE SMA Channel 0 SENSE is also connected to TEST_NODE which provides the remote Kelvin Sense return path The MI_MONITOR is configured to output the Channel 0 MI S The MONITOR is configured to output the Channel 1 MI S Channels 2 7 are configured in FV MI mode Figure 4 ISL55180 EVM Ganging Configuration Simplified Block Diagram Motherboard Europa Load Board PC J2 FVMI Parallel Cable EVM Power S...

Page 13: ... E9 DATA_6 Short Pin 1 2 source from latch Short Pin 2 3 source from SMA TC23 E8 DATA_5 Short Pin 1 2 source from latch Short Pin 2 3 source from SMA TC22 E7 DATA_4 Short Pin 1 2 source from latch Short Pin 2 3 source from SMA TC21 E1 LB_RCK Short Pin 1 2 towards back of board TC20 E6 DATA_3 Short Pin 1 2 source from latch Short Pin 2 3 source from SMA TC19 E5 DATA_2 Short Pin 1 2 source from latc...

Page 14: ...finitions Table 4 lists the ISL55180 Loadboard Jumper definitions Table 6 ISL55180 Loadboard Jumper Definitions Jumper Description Default Configuration E1 Connect VFORCE Installed E2 VCCO Select Pin 1 2 Select BN1 E3 VEE Select Pin 1 2 Select BN2 E4 Switcher A Bypass Installed switcher bypassed E5 Switcher B Bypass Installed switcher bypassed ...

Page 15: ...and Dialog Boxes Figure 5 illustrates the ISL55180 EVM menu options that provide access to the ISL55180 dialog boxes For each ISL55180 register there is a control field allowing the customer to have full control over the ISL55180 device These screen shots show the default FV MI configuration Figure 5 Device Configuration Menu Options ...

Page 16: ...ISL55180 EVM Getting Started Rev A04 11 28 2012 Copyright Elevate Semiconductor Corporation 2012 Page 16 of 20 Figure 6 ISL55180 Configuration Dialog Box Figure 7 ISL55180 DC Levels Dialog Box ...

Page 17: ...SL55180 EVM Getting Started Rev A04 11 28 2012 Copyright Elevate Semiconductor Corporation 2012 Page 17 of 20 Figure 8 ISL55180 DAC Configuration Dialog Box Figure 9 ISL55180 Central Register Dialog Box ...

Page 18: ...anana LED Symbol Legend REXT A D A D A D DATA_ TC17 TC18 TC19 TC20 TC22 TC23 TC24 TC25 8 CON_FORCE _TN CENTRAL_D 3 0 EXT_MON_OE TC27 TC_32 A D GANG_IN0 GANG_IN2 GANG_IN4 GANG_IN6 TC16 E13 TJ A D CH1_FORCE CH4_FORCE CBIT7 E2 E3 DUT_GND Various Analog Nodes 32 LB_AMUX TC_31 A D Voltage Divider SENSE_ CON_SENSE _TN 1K VFORCE DG _SEL x8 LB Amux LB Amux CH2_FORCE VCC 3 CAP_VDD DAC Latch GANG_OUT1 TC_9 ...

Page 19: ...nd LB_DATA3 signals originating from the motherboard The loadboard latches are labeled STB_I to STB_Q This was named as an extension to the REG_A to REG_H Octal FVMI Motherboard registers Figure 11 Controller Section Detailed Block Diagram EEPROM 1K x 16 Bit Latch N 8 DUTGND _SEL 8 Latch O 8 LB_AMUX 4 GANG_IN_SEL DUTGND_SEL REXT_SEL VREF_SEL Latch P 8 LB_AMUX_EN0 RDB_SEL 2 0 3 FSEL 3 Unused Switch...

Page 20: ...or Corporation 2012 Page 20 of 20 4 Document Revision History Revision Date Description A04 6 18 12 Updated several figures A03 2 27 12 Updated document A02 1 27 10 Add loadboard changes and switcher section A01 9 24 09 Initial Draft ISL55180 R1 and Europa Switcher Rev A support ...

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