EKF PC3-ALLEGRO User Manual Download

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User Guide • PC3-ALLEGRO • CompactPCI

PlusIO CPU Board • Intel® i7-3xxx Processor

Feature Summary

Regulation & Environmental

RoHS compliant

EC Regulations

EN55022, EN55024, EN60950-1 (UL60950-1/IEC60950-1)

Operating Temperature: 0°C to +70°C (Industrial Temperature Range on Request)

Storage Temperature: -40°C to +85°C, max. Gradient 5°C/min

Humidity 5% ... 95% RH non Condensing

Altitude -300m ... +3000m

Shock 15g 0.33ms, 6g 6ms

Vibration 1g 5-2000Hz

MTBF

104 x 10

h (11.9 years) @ 50°C

Designed & Manufactured in Germany

ISO 9001 Certified Quality Management

RT OS Board Support Packages & Driver

LynxOS - on request

On Time RTOS-32 - on request

OS-9 - on request

QNX 4.x, 6.x - on request

Real-Time Linux (RT Patch) - on request

RTX - on request

VxWorks 6.9 - under development

VxWorks 7.0 - on request

Others - on request

Summary of Contents for PC3-ALLEGRO

Page 1: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Card Intel Core i7 3xxx Processor Quad Core Ivy Bridge Document No 7106 Edition 31 19 June 2017...

Page 2: ...Assembly 15 Front Panel Connectors 16 Front Panel Switches Indicators 16 On Board Connectors Sockets 17 Pin Headers 17 Jumpers 17 Microprocessor 18 Thermal Considerations 19 Main Memory 20 Graphics S...

Page 3: ...evision Register 54 GPIO Usage 55 GPIO Usage QM77 PCH 55 Configuration Jumpers 57 Configuration PCI Express Switch DS P 57 Loading UEFI BIOS Setup Defaults P GP 59 Manufacturer Mode Jumper P MFG 60 RT...

Page 4: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor Backplane Connectors 86 CompactPCI J1 86 CompactPCI J2 PlusIO 87 EKF 4 ekf com...

Page 5: ...ed photo PC3 w PCL Side Card Assembly Exploded View jj 11 August 2014 13 Added Board Control and Status Registers updated links mib 21 August 2014 14 Added note on operation in systems with a 64 bit C...

Page 6: ...om p pc3 pc3_pi pdf Nomenclature Signal names used herein with an attached designate active low lines Trade Marks Some terms used herein are property of their respective owners e g Chief River Ivy Bri...

Page 7: ...tandard Version 1 October 26 2009 www vesa org DVI Digital Visual Interface Rev 1 0 Digital Display Working Group www ddwg org Ethernet IEEE Std 802 3 2000 Edition standards ieee org LPC Low Pin Count...

Page 8: ...Gigabit Ethernet and USB are passed from the PC3 ALLEGRO through the special UHM connector to the backplane for usage either on a PlusIO rear I O transition module or CompactPCI Serial card slots Comp...

Page 9: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor EKF 9 ekf com...

Page 10: ...tel QM77 Panther Point Platform Controller Hub PCH Integrated HD Graphics Engine 3 Independent Displays Enhanced Media Processing Up to 3 Display Configuration Front Panel Dual mDP or Single VGA Conne...

Page 11: ...zzanine Expansion Connector HSE 4 x SATA 4 x USB PCI Express Mezzanine Expansion Connector PCIE 4 Lanes Third Display Mezzanine Expansion Connector DP Variety of Mezzanine Expansion Boards Side Cards...

Page 12: ...C to 85 C max Gradient 5 C min Humidity 5 95 RH non Condensing Altitude 300m 3000m Shock 15g 0 33ms 6g 6ms Vibration 1g 5 2000Hz MTBF 104 x 103 h 11 9 years 50 C Designed Manufactured in Germany ISO 9...

Page 13: ...wer Requirements Power Requirements Board Load Current A at 3 3V 0 17V 0 1V Load Current A at 5V 0 25V 0 15V Maximum Performance LFM HFM Turbo 1 Windows 7 Idle LFM HFM Turbo 1 Maximum Performance LFM...

Page 14: ...Ie SPI 2 DP2 GbE GbE Intel Chief River Platform 82574 IT DDR3 ECC Soldered DDR3 ECC SODIMM FDI DDR3 1333 1600 Dual Channel up to 16GB 4 PCIe Gen3 1 PCIe Gen3 DP3 Mezzanine Side Card I O PCIe Gen2 Swit...

Page 15: ...nent Assembly PC3 ALLEGRO EKF ekf com Ivy Bridge i7 CPU 2 Channel ECC DDR3 SODIMM ECC DDR3 SDVO DP PCIE EXP HSE PC3 ALLEGRO CompactPCI PlusIO EKF ekf com Dual GbE VGA P GP P FPH P RTC BAT P MFG 1 1 1...

Page 16: ...2 Universal Serial Bus 3 0 type A receptacles VGA VGA analog video output connector Mini DisplayPort connectors available as alternate Front Panel Switches Indicators EB LED indicating Backplane Ether...

Page 17: ...board J SDVO Digital Display Interface Connector DisplayPort J1 J2 CompactPCI Bus 32 bit universal V I O 33MHz PlusIO SODM1 204 pin DDR3 ECC Memory Module SDRAM PC3 12800 Socket ECC SODIMM XDP CPU Deb...

Page 18: ...up to 2 1GHz for quad core and up to 2 5GHz on dual core devices Due to Enhanced Intel SpeedStep and Intel Turbo Boost Technology each core can decrease or increase its nominal operating frequency The...

Page 19: ...airflow to 3m s 600LFM or more The table showing the supported processors above give also the maximum power consumption TDP Thermal Design Power of a particular processor Fortunately the power consump...

Page 20: ...ze of 2x4GB of memory which is recommended to run the operating systems Windows Vista or Windows 7 The memory controller supports symmetric and asymmetric memory organization The maximum memory perfor...

Page 21: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor Top Side Soldered Memory Bottom Side Soldered Memory EKF 21 ekf com...

Page 22: ...lity to gain access to the 3rd DisplayPort interface As an option the PC3 ALLEGRO can be equipped with an ordinary HD D Sub 15 lead connector VGA style This connector is suitable for analog signals on...

Page 23: ...or full duplex operation IEEE 802 3u 802 3ab Auto Negotiation for the fastest available connection Jumperless configuration complete software configurable Two bicoloured LEDs integrated into the dedi...

Page 24: ...cted via J HSE to the 6Gbps ports for fast data storage Four SATA interfaces are provided by a Marvell 88SE9230 Controller available on the Backplane connector J2 Hardware RAID configuration level 0 1...

Page 25: ...J2 Another four PCI Express lanes are provided by the Intel CoreTM i7 processor to the J PCIE connector A small DIP switch DS P located on the backside of the board are used to configure different lan...

Page 26: ...the QM77 PCH Utility Interfaces Besides the high speed mezzanine interface connectors J HSE and J PCIE the PC3 ALLEGRO is provided with the utility interface expansion connector socket J EXP This conn...

Page 27: ...perCap can be stuffed instead of the battery SPI Flash The BIOS and iAMT firmware is stored in flash devices with Serial Peripheral Interface SPI Up to 16MByte of BIOS code firmware and user data may...

Page 28: ...button override is triggered by opening the front panel handle for at least 4 seconds which results in bringing the board to power state S5 In case of entering this state unlock and lock the front pan...

Page 29: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor EKF ekf com 1 2 3 4 5 6 7 8 4s EKF 29 ekf com...

Page 30: ...n the steps 2 10 50 and 255 seconds After alerting the WD and programming the time out value the related software e g application program must trigger the watchdog periodically For details on programm...

Page 31: ...hould be interpreted altogether for system diagnosis LED Status PG Green Red GP Green Red HD Green Red OFF GREEN GREEN Sleep State S5 Soft Off OFF GREEN OFF Sleep State S4 Suspend to Disk Hibernate OF...

Page 32: ...e bicolour LED can be observed from the PC3 ALLEGRO front panel The status of the red part within the LED is controlled by the GPIO18 of the PCH QM77 Setting GPIO18 to 1 will switch on the red LED Tur...

Page 33: ...of the Marvell 88SE9230 SATA RAID Controller As previously described the green part of this LED may change its function dependent on the state of the LED PG EB Ethernet Backplane LED To monitor the li...

Page 34: ...nse to remove the system controller from a CompactPCI system However it is capable to recognize the hot swap of peripheral boards and to start software that is performing any necessary system reconfig...

Page 35: ...3 ALLEGRO is provided with several stacking connectors for attachment of a mezzanine expansion module aka side board suitable for a variety of readily available mezzanine cards please refer to www ekf...

Page 36: ...CAPELLA Side Card 8HP Assembly Related Documents Mezzanine Modules and Side Cards C40 C47 Series Mezzanine Storage Modules www ekf com c ccpu c4x_mezz_ovw pdf PCL CAPELLA Mezzanine Side Card www ekf...

Page 37: ...I Express SATA Gigabit Ethernet and USB serial data lines On a hybrid backplane both card styles can reside CompactPCI and CompactPCI Serial with the PC3 ALLEGRO in the middle as controller for both b...

Page 38: ...e The J2 P2 pin assignments of a 64 bit CPCI backplane differ substantially from a CompactPCI PlusIO backplane which may result in a short circuit situation For use with a 64 bit CompactPCI backplane...

Page 39: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor PC1 GROOVE as System Controller in a Hybrid System CompactPCI PlusIO Racks Available EKF 39 ekf com...

Page 40: ...ocessor As an alternate the PC3 ALLEGRO can be combined with a CompactPCI PlusIO rear I O transition module such as the PR1 RIO which is provided with I O connectors on board and back panel for all hi...

Page 41: ...ekf com c ccpu cpci_mezzanine_evolution pdf J EXP I F Type Controller LPC Low Pin Count CPU HD Audio CPU SMBus CPU buffered 2 x USB 2 0 PCH J HSE I F Type Controller SATA1 SATA4 PCH 3GT s SATA2 SATA3...

Page 42: ...disconnect power or telecommunication links before you open the system or perform any procedures can result in personal injury or equipment damage Some parts of the system can continue to operate eve...

Page 43: ...remove the AC power cord C Attach your antistatic wrist strap to a metallic part of the system C Remove the board packaging be sure to touch the board only at the front panel C Identify the related C...

Page 44: ...em remove the AC power cord C Attach your antistatic wrist strap to a metallic part of the system C Identify the board be sure to touch the board only at the front panel C Unfasten both front panel sc...

Page 45: ...nications cable assemblies must be shielded shield connected only at one end of the cable C Use ferrite beads for cabling wherever appropriate C Some connectors may require additional isolating parts...

Page 46: ...he values in the CMOS RAM The battery should last during the lifetime of the PC3 ALLEGRO For replacement the old battery must be desoldered and the new one soldered We suggest that you send back the b...

Page 47: ...D Intel ME Keyboard Text Redirection 0 25 0 0x8086 0x1502 PCH Gigabit LAN NC1 82579LM 0 26 0 0x8086 0x1E2D USB EHCI Controller 2 0 27 0 0x8086 0x1E20 Intel High Definition Audio Controller 0 28 0 7 0x...

Page 48: ...l EEPROM a supply voltage temperature controlling device and a set of board control and status registers Additional devices may be connected to the SMBus via the CompactPCI Serial backplane signals I2...

Page 49: ...onding supply voltages of the PC3 ALLEGRO Input Source Resolution mV Register AIN1 Processor Core Voltage 9 8 0x28 AIN2 Graphics Core Voltage 9 8 0x29 VCCP1 1 5V 14 1 0x21 VCCP2 D2 1 8V 14 1 0x25 2 5V...

Page 50: ...egisters located on the SMBus at Device ID 0x5c on the following addresses 0xA0 CMD_CTRL0_WR Write to Control Register 0 Write Only 0xA1 CMD_CTRL0_RD Read from Control Register 0 Read Only 0xB0 CMD_ST...

Page 51: ...in the front panel handle 5 FRDIS 0 Enable the system reset button within the front panel Default 1 Disable the system reset button within the front panel 4 3 WDGT0 WDGT1 Maximum Watchdog retrigger ti...

Page 52: ...er failure of the CPU VCC_SA voltage regulator 3 PF105L 0 Normal operation 1 Last system reset may be caused by a power failure of the V1 05LAN voltage regulator 2 PF105S 0 Normal operation 1 Last sys...

Page 53: ...e out period 4 PF12A 0 Normal operation 1 Power failure on the 12V voltage rail 3 PF133S 0 Normal operation 1 Last system reset may be caused by a power failure of the V1 05S or V3 3S voltages 2 PF133...

Page 54: ...PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor Read PLD Revision Register Write Not allowed Read SMBus Address 0xC1 Bit Description CMD_PLDREV 7 0 PLDREV Read PLD Revison Number EKF...

Page 55: ...LE Enable Ethernet Controller NC2 GPIO 13 I 3 3V HM_INT Hardware Monitor LM87 Interrupt Line GPIO 14 I 3 3V USB_OC7 USB J EXP Port 1 or 2 Overcurrent Detect GPIO 15 3 3V Not used pulled to V3 3A GPIO...

Page 56: ...3V Not used pulled to GND GPIO 47 O 3 3V CLKOE_3J2 J2 PCIe3 clk enable pulled to V3 3A GPIO 48 49 3 3V Not used pulled to GND GPIO 50 52 3 3V Not used pulled to V3 3S GPIO 53 O 3 3V CPCI_CLKBUF_EN Ena...

Page 57: ...uration are honoured by the PC3 ALLEGRO not before a system reset was performed DS P PCIe Link Width 1 2 PCIe Switch Upstream J PCIE OFF OFF 4 Lanes 5GT s 4 Links x 1 Lane 5GT s ON OFF 4 Lanes 5GT s 1...

Page 58: ...t side boards mounted to the PC3 ALLEGRO Side Board DS P PCIe Link Width 1 2 J PCIE None OFF OFF 4 Links x 1 Lane 5GT s CCI RAP OFF OFF 4 Links x 1 Lane 5GT s CCK MARIMBA ON OFF 1 Link x 4 Lanes 5GT s...

Page 59: ...ual boot devices Using the jumper P GP is only necessary if it is not possible to enter the setup of the BIOS To reset the settings mount a jumper on P GP and perform a system reset As long as the jum...

Page 60: ...acturer mode This is necessary only on board production time and should not used by customers For normal operation the jumper should be removed The pin header P MFG is not stuffed on the PC3 ALLEGRO b...

Page 61: ...FI BIOS Setup to EKF Factory Defaults nor resets the time and date register values of the RTC Real Time Clock To reset the RTC core the board must be removed from the system rack Short circuit the pin...

Page 62: ...ices inside the system chassis such as internal peripherals Not all of these connectors are short circuit protected Do not use these internal connectors for powering devices external to the computer c...

Page 63: ...t Panel Connectors With respect to the video connector the PC3 ALLEGRO is available in two flavours either dual mDP or VGA USB 3 0 G ETH PC3 ALLEGRO Dual mDP mDP 1 PG GP HD EB RST 2 PC3 ALLEGRO VGA EK...

Page 64: ...e VESA Mini DisplayPort J DP1 2 20 PWR 1 19 GND 18 AUX_CH N 17 LANE2 N 16 AUX_CH P 15 LANE2 P 14 GND 13 GND 12 LANE3 N 11 LANE1 N 10 LANE3 P 9 LANE1 P 8 GND 7 GND 6 CONFIG2 GND 5 LANE0 N 4 CONFIG1 3 L...

Page 65: ...he pins 20 of both cable ends in order to avoid a back driving conflict Unfortunately there are cable assemblies available with pin 20 passed through with unpredictable results on the system behaviour...

Page 66: ...latching device For rugged applications with need for a connector locking mechanism EKF offers two methods of fixing 1 The front panel is provided with a threaded hole for fixing a removable H shape...

Page 67: ...ssor A third DisplayPort video output is available when combining the PC3 ALLEGRO with the mezzanine side card PCS BALLET The standard DP connector is provided with latches which may be important for...

Page 68: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor PC3 ALLEGRO w PCS BALLET Side Card 2 5 Inch SSD 8HP PC3 ALLEGRO w PCS BALLET C32 FIO C20 SATA 12HP EKF 68 ekf com...

Page 69: ...e connector The connector VGA replaces the two Mini DisplayPort receptacles and the digital video interface therefore is not available concurrently with this option J VGA Option 1 RED 2 GREEN 3 BLUE 4...

Page 70: ...ptacle USB 3 0 dual type A receptacle stacked 18 position 1 VBUS 5V 1 5A max 1 2 USB D 3 USB D 4 GND 5 SS RX 6 SS RX 7 GND 8 SS TX 9 SS TX 1 5V via 1 5A current limited electronic power switch Power r...

Page 71: ...CI PlusIO CPU Board Intel i7 3xxx Processor Another two USB 3 0 connectors would be available when the PC3 ALLEGRO is combined with the PCS BALLET mezzanine side card PC3 ALLEGRO w PCS BALLET Mezzanin...

Page 72: ...USB 3 0 PCS BALLET RS 232 G ETH HD RST USB 3 0 PG GP mDP 1 2 S 1 2 DP D EB C O M C C O M D K B M S U S B C32 FIO PC3 ALLEGRO Dual mDP PCS BALLET RS 232 EKF draft do not scale ekf com PC3 ALLEGRO Dual...

Page 73: ...1_MDX3 8 NC1_MDX3 Port 2 1 NC2_MDX0 2 NC2_MDX0 3 NC2_MDX1 4 NC2_MDX2 5 NC2_MDX2 6 NC2_MDX1 7 NC2_MDX3 8 NC2_MDX3 The lower green LED indicates LINK established when continuously on and data transfer a...

Page 74: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor Mezzanine Side Card Connector Suite Mezzanine Connectors EKF 74 ekf com...

Page 75: ...CLK 3 37 38 HDA_SDIN1 CL_DATA 3 SPEAKER 39 40 12V 4 1 Power rail switched on in state S0 only 2 Connected to SMBus via buffered switch isolated after reset 3 Stuffing option default is the HDA option...

Page 76: ...4_P USB_HSE2_N a18 b18 USB_HSE4_N GND a19 b19 GND USB_HSE_OC1 a20 b20 USB_HSE_OC34 USB_HSE_OC2 a21 b21 USB_HSE_OC34 3 3VS 1 a22 b22 5VS 1 3 3VS 1 a23 b23 5VS 1 3 3VA 2 a24 b24 5VA 2 12V 3 a25 b25 12V...

Page 77: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor PC3 ALLEGRO w C47 MSATA Dual SSD Mezzanine Storage Module PC3 ALLEGRO w C48 M2 Dual M 2 SATA SSD Module EKF 77 ekf com...

Page 78: ...27 28 GND PE_3TP 29 30 PE_3RP PE_3TN 31 32 PE_3RN GND 33 34 GND PE_4TP 35 36 PE_4RP PE_4TN 37 38 PE_4RN GND 39 40 GND 1 Power rail switched on in state S0 only WARNING The 3 3V 5V power pins are not...

Page 79: ...E2 17 18 SDVO_CTR_DATA DP_CFG1 GND 19 20 GND To use J SDVO as either an SDVO or a further DisplayPort interface some of the control lines are configurable by a multiplexer The state of this multiplexe...

Page 80: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor PC3 ALLEGRO w PCS BALLET Half Slim SATA SSD 8HP PC3 ALLEGRO w PCS BALLET C41 CFAST 8HP EKF 80 ekf com...

Page 81: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor Typical 8HP Assembly w PCS BALLET Side Card C42 SATA 8HP Assembly w PCS BALLET Side Card C47 MSATA EKF 81 ekf com...

Page 82: ...User Guide PC3 ALLEGRO CompactPCI PlusIO CPU Board Intel i7 3xxx Processor PC3 ALLEGRO w PCL CAPELLA Side Card 8HP Assembly PC3 ALLEGRO w PCL CAPELLA Side Card 8HP Assembly EKF 82 ekf com...

Page 83: ...h which is integrated into the PC3 ALLEGRO front panel handle ejector lever The switch performs a power button event e g system shutdown by short circuiting the pins 1 and 3 of P FPH when activated ho...

Page 84: ...rovided with a powerful PLD in System Programmable Logic Device which replaces legacy glue logic The programming header P ISP is not stuffed in use for manufacturing only Its footprint is situated at...

Page 85: ...apter ITP XDP SFF 26 is required in addition to convert the 26 pin XDP SFF 26 Pin connector to the standard 60 pin XDP The header XDP1 would be mounted on the PCB bottom side but is not stuffed by def...

Page 86: ...GND V I O AD25 AD24 7 AD30 AD29 AD28 GND AD27 6 REQ 1 GND 3 3V CLK AD31 5 BRSVP1A5 4 BRSVP1B5 4 RST GND GNT 4 IPMB PWR GND V I O INTP 1 INTS 1 3 INTA 1 INTB 1 INTC 1 5V INTD 1 2 TCK 4 5V TMS 4 TDO 4 T...

Page 87: ...1_PE_CLK AD34 4_PE_CLKE AD33 SATA_SCL GND reserved 2 AD32 13 3_PE_CLK AD38 1_PE_CLK GND 3_PE_CLKE V I O SATA_SDO AD37 SATA_SL AD36 12 4_PE_RX00 AD42 1_PE_CLKE AD41 2_PE_CLKE AD40 SATA_SDI 2 GND 4_SAT...

Page 88: ...ected 3 This pin is pulled up with 10kS to 3 3V 4 Pin positions printed italic 64 bit system slot signals for reference only 5 Pin positions printed blue PlusIO options 6 As an exclusive stuffing opti...

Page 89: ...d All Limits EKF High Performance Embedded Industrial Computers Made in Germany boards systems solutions EKF Elektronik GmbH Philipp Reis Str 4 Haus 1 Lilienthalstr 2 Haus 2 59065 HAMM Germany Phone 4...

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