Eaton Vickers SMC20, Product Support

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Configuring vs. Programming3–6, Fig. 3–2B
Connections1–1, 1–4, 2–4
Control AlgorithmFig. A–1
CPU1–4, 1–6, 2–7, 5–3, B–1
Creep Speed3–15, Fig. 3–2B
CTS2–31
Current Output2–11, 2–18
D/A3–11, A–1, Fig. 3–2B, Fig. 3–5
D/A Offset3–15, A–3
Data Bits1–7, 3–18, 5–8
DC I/O ConnectionsFig. 1–1
DC I/O LED IndicatorsFig. 1–1
DCD2–31
Deceleration3–5, 3–36, 4–1, 4–5, 4–14, 4–17, Fig. 3–2B
Default Assignment3–19, 3–21, 3–22, 3–23
Define Reference3–35
Derivative Gain3–16, A–2
Differential Analog Input2–11, 2–17
Differential Analog Output2–11, 2–15, Fig. 2–9
Digital Input/Output1–3, 1–4, 1–7, 2–13, 2–19, 2–21, 3–19, 4–28, 4–29
Digital Inputs1–6, 2–10, 2–19, 2–21, 3–35, 4–22, 4–29, Fig. 2–13
Digital Outputs1–6, 2–10, 2–20, 2–21, 4–22, Fig. 2–14
Digital Signal Processor1–3
Digital–to–Analog2–11, 3–11, A–3
Dither1–3
DO+2–11, 2–15
DO–2–11, 2–15
DREF3–35
Drive Amplifier1–1, 2–10, 2–12, 2–13, 2–16, 2–21, 2–22, 3–19, 3–20
Drive Ready3–22, 3–23
DRV2–12, 2–13, 2–22, 3–19, 3–20
DSP1–6
DSP Error5–6
DSR2–31
DTR2–31
Dwell Time2–21, 4–4, 4–7, 4–21, Fig. 3–2B
EDIT3–3
Enable1–4, 2–7, 2–8, 2–33, 4–28, 5–2, 5–3
ENBL1–6, 2–7, 2–8, 5–2, 5–3
Encoder Connections2–25, 2–26
Engineering Unit1–3, 3–13, 3–15, 3–16, 3–27, 3–37, 4–11, 4–18, A–2, Fig. 3–2B, Fig. 3–6
ENTER3–3
Entry Conditions4–4, 4–6, 4–21, Fig. 4–2, Fig. 4–5
Entry Events4–22
ERR2–12, 2–13, 2–22, 3–19, 3–20
Error3–22, 3–23, 3–31, 4–9, 5–2, 5–4, 5–5, 5–6, 5–7
Error Bits5–1, 5–2, 5–5
Error Condition2–22, 5–6, 5–7
Error Flags3–10, 5–7
Error Parameters3–11
Error Recovery Speed3–15