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158004.B00

B3

LK8

ADC1 or LINE_IN_L

This link determines whether Connector J6 pin 4 is used for the analog to digital
convertor channel 1 input, or the audio codec Line In Left input.

Pin 4 is A/D convertor ADC1:

Fit link

Pin 4 is audio codec Line In Left input:

Omit link (default)

LK9

ADC2 or LINE_OUT_R

This link determines whether Connector J6 pin 6 is used for the analog to digital
convertor channel 2 input, or the audio codec Line Out Right output.

Pin 6 is A/D convertor ADC2:

Fit link

Pin 6 is audio codec Line Out Right input:

Omit link (default)

LK10 ADC3 or LINE_OUT_L

This link determines whether Connector J6 pin 8 is used for the analog to digital
convertor channel 3 input, or the audio codec Line Out Left input.

Pin 8 is A/D convertor ADC3:

Fit link

Pin 8 is audio codec Line Out Left input:

Omit link (default)

LK11 A/D Converter Reference

This link is used to select the source of the VREF input voltage to the analog to digital
converter. Note that when the link is fitted the on-board +5V power supply is not only
connected to the A/D converter VREF pin, but is also taken out to the VREF pin on
connector J6 (provided that LK6 is also fitted)

VREF is supplied by on-board +5V:

Fit Link (default).

VREF is supplied from an external source via J6:

Omit Link.

LK12 Clock

Shutdown

This link is factory fitted and must not be changed.

LK13 Super I/O Configuration

This link is factory fitted and must not be changed.

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Summary of Contents for 104-plus

Page 1: ...TP400 PC 104 PLUS PC COMPATIBLE COMPUTER TECHNICAL REFERENCE MANUAL Revision B00 19 February 2001 TRM TP400 158004 B00 CGP ...

Page 2: ... This page is intentionally left blank ...

Page 3: ...to infringe any patents Whilst every effort has been made to ensure that this document is correct errors can occur If you find any errors or omissions please let us know so that we can put this right All information contained in this manual is proprietary to DSP Design Limited and cannot be reproduced without the consent of DSP Design Limited The circuit design and printed circuit board design is ...

Page 4: ... This page is intentionally left blank ...

Page 5: ... SUPER I O CHIP 21 3 3 EXTRA UART 21 3 4 SERIAL PORTS 21 3 4 1 Signals Addressing and Interrupts 21 3 4 2 RS 485 Operation 22 3 4 3 Disabling Serial Ports 23 3 4 4 Extended Modes 23 3 4 5 Infra Red Operation Modes 23 3 5 PRINTER PORT 24 3 6 REAL TIME CLOCK 25 3 7 KEYBOARD AND MOUSE 26 3 8 FLOPPY DISK DRIVE 27 3 9 IDE DISK DRIVE 27 3 10 DISPLAY CONTROLLER 29 3 10 1 Overview 29 3 10 2 Using CRTs and...

Page 6: ...SYSTEM BIOS 50 6 2 BIOS SETUP PROGRAM 50 6 2 1 Operation of the Setup Program 51 6 2 2 Reducing Boot Time 52 6 3 VGA BIOS AND OTHER BIOS EXTENSIONS 52 6 3 1 Principles of Operation 52 6 3 2 The VGA BIOS Extension 52 6 3 3 The Flash File System BIOS Extension 53 6 4 MS DOS AND OTHER OPERATING SYSTEMS 53 6 5 FLASH MEMORY PROGRAMMING 54 6 5 1 Programming the 2M byte 29F016 Flash Chips 54 6 5 2 Progra...

Page 7: ...e Selection B6 LK108 Power Supply Clock B6 LK109 Ethernet Serial EEPROM B6 LK110 Ethernet TxD Circuit B6 LK111 Ethernet PCI Slot Selection B6 LK112 Ethernet PCI Interrupt Selection B6 LK113 SDRAM Clock Feedback B7 LK114 IDE PDIAG Pin B7 APPENDIX C MECHANICAL DRAWINGS AND SCHEMATICS C1 APPENDIX D OPTIONS AND ORDERING INFORMATION D1 D 1 PROCESSOR BOARDS D1 D 2 SDRAM MEMORY MODULES D1 D 3 TP400 PROCE...

Page 8: ...INTO THE CF100 G2 G 4 CONFIGURING THE TP400 FOR THE CF100 AND CARD G2 G 5 USING COMPACT FLASH CARDS G3 G 5 1 Hot Plugging G3 G 5 2 Formatting and Making the Card Bootable G3 G 5 3 Configuring the CF100 as a slave drive G3 G 6 ACCESSORIES G4 G 7 DIMENSIONS G4 APPENDIX H RELIABILITY H1 H 1 ASSUMPTIONS AND METHODOLOGY H1 H 1 1 Reliability Standard H1 H 1 2 Methodology H1 H 1 3 Failure Effect Assumpti...

Page 9: ...LUS J3 PIN ASSIGNMENTS E4 TABLE E6 RS485 FUNCTION OF COM2 SERIAL PORT E5 TABLE E7 J4 I O CONNECTOR PIN ASSIGNMENTS E6 TABLE E8 J5 COM3 COM4 CONNECTOR PIN ASSIGNMENTS E7 TABLE E9 J6 VGA AND A D CONNECTOR PIN ASSIGNMENTS E8 TABLE E10 J7 PANEL LINK CONNECTOR PIN ASSIGNMENTS E8 TABLE E11 J8 FLAT PANEL CONNECTOR PIN ASSIGNMENTS E9 TABLE E12 FUNCTION OF FLAT PANEL SIGNALS E10 TABLE E13 J9 USB CONNECTOR ...

Page 10: ...EMENT C4 FIGURE C4 DAUGHTER BOARD BOTTOM COMPONENT PLACEMENT C5 FIGURE C5 MAIN BOARD MECHANICAL DIMENSIONS C6 FIGURE C6 DAUGHTER BOARD MECHANICAL DIMENSIONS C7 FIGURE H1 TP400 MEAN TIME TO FAILURE H4 FIGURE H2 TP400 UNIT FAILURE RATE H4 FIGURE J1 TP400ET MECHANICAL DRAWINGS J2 FIGURE J2 TP400ET CIRCUIT DIAGRAM J2 FIGURE K1 TP300USB MECHANICAL DRAWINGS K2 FIGURE K2 TP300USB CIRCUIT DIAGRAM K2 REVIS...

Page 11: ...PC 104 bus boards The PCI bus connector is a 120 pin connector on the edge of the PCB opposite the PC 104 connectors The board supports up to 256M bytes of high speed SDRAM It also features the standard PC compatible floppy and IDE disk interfaces serial ports parallel port keyboard interface PS 2 mouse port and the standard PC speaker The powerful graphics controller in the Geode GX1 can drive bo...

Page 12: ...by special order A Flash File System is provided with every TP400 to provide a read write logical disk drive Keyboard PS 2 mouse and speaker ports Two high speed USB ports Filter components and a dual USB socket are provided on a small PCB the TP300USB which connects via twisted pair cable to the TP400 The Geode GX1 integrates graphics circuitry providing VGA graphics on CRT monitors at resolution...

Page 13: ...BILITY The TP400 offers an extremely high degree of compatibility with desktop PC computers This compatibility extends from the operating system level through BIOS level compatibility to register level compatibility The Geode GX1 chip set used on the TP400 board includes on chip peripherals timers interrupt controller DMA controller etc These are software compatible with equivalent Intel periphera...

Page 14: ...e board edge opposite the PC 104 bus connectors This new connector carries the PCI bus signals allowing the TP400 to access high performance PCI chips on expansion boards PC 104 and PC 104 Plus boards stack one on top of another providing a compact rugged computer system For details of the PC 104 bus specification and the PC 104 Plus specification see DSP Design s web site Because the Geode GX1 ma...

Page 15: ... bus on which the Flash memory and Super I O chips are located The Super I O chip includes the floppy and IDE disk controllers serial and parallel I O functions as well as the keyboard and mouse controller A second dual UART chip implements COM3 and COM4 A 16 bit PC 104 interface allows the TP400 to perform memory and I O accesses to the PC 104 bus and a PC104 Plus interface allows PCI bus transfe...

Page 16: ...E2PROM RESET FLASH UARTS ETHERNET SPKR SPKR CRT Utility Register POWER SUPPLY 2 0V 3 3V CLOCK GEN J3 J10 IDE J9 J8 USB TFT J6 CRT AUDIO A D ETHERNET J106 J1 J2 PC 104 J5 COM3 COM4 SPEAKER COM1 COM2 PRN KBD MOUSE IRDA BATT FLOPPY Video Graphics PCI Bus RS232 RS232 RS232 RS485 J4 J10 PANELLINK PANELLINK J7 ...

Page 17: ...hard disk controller a floppy drive plus cable PC AT and PCI slots for interfacing standard PC and PCI bus cards to the PC 104 bus and a battery for CMOS RAM backup The TCDEVPLUS has all the standard PC connectors for interfacing to the outside world These include serial port 9 way D type connectors a parallel port 25 way D type connector a VGA connector and PS 2 style keyboard and mouse connector...

Page 18: ...plied as part of the TP400PAK starter pack see Appendix D for details Enable the floppy disk controller and VGA graphics on the TCDEVPLUS This is done by setting the jumpers at jumper areas E3 and E5 to the EN position Disable the IDE disk controller on the TCDEVPLUS by setting jumper E4 to the DIS position The TCDEVPLUS COM4 UART should be disabled at E8 The battery back up jumper should be set i...

Page 19: ...connectors In principle it is possible to use a 44 way cable to connect the TP400 s IDE controller to the TCDEVPLUS PCB to take advantage of the wider range of connectors on the TCDEVPLUS PCB while using the faster TP400 s IDE controller Unfortunately if you want to do this with the REV B TCDEVPLUS you must cut pin 32 of the ribbon cables The REV C TCDEVPLUS provides links to do this Section 3 9 h...

Page 20: ...way connector with the braid earth connecting to one of the 0V wires Users who are using the earlier TCPSU power supply must explicitly connect the mains earth to their TCDEV by plugging the green and yellow earth lead onto the spade terminal soldered to the printer connector though note the earlier warning that the 25W TCPSU will probably not have enough capacity for TP400 development Connect the...

Page 21: ...oping your product with the TCDEVPLUS you may be interested in using our TCONN board for production The TCONN is a breakout board that provides an easy way of connecting to DSP Design s PC 104 processor boards It mates with the I O connectors of the PC 104 board and provides standard PC compatible connectors for most of the peripherals All connectors are filtered which greatly simplifies complianc...

Page 22: ...itry is not fully implemented within the Geode chip Missing registers are emulated in software using SMIs System Management Interrupts This can cause problems in certain cases although there is usually a work around When the VGA emulation is in operation in some display modes a regular SMI occurs every 1ms During this time the Geode will not respond to interrupts and if interrupts are arriving at ...

Page 23: ...ation The Geode GX1 also integrates a high performance graphics engine This provides VGA compatible graphics as well as adding high performance 2D graphics accelerator logic that is driven by operating system specific drivers To provide a high level of system integration improve performance and reduce system costs the graphics engine uses a portion of the system SDRAM memory as graphics memory Thi...

Page 24: ...cuitry The Geode GX1 and CS5530A chips also include a number of internal configuration registers These registers are unique to the Geode GX1 chip set They control timing on the expansion bus shadow RAM SDRAM configuration memory mapping and so forth They are initialized by the BIOS and will not normally need to be accessed by the user The performance of the TP400 may be gauged by the processor per...

Page 25: ...t sink Thermal materials are available to provide a good thermal bond between the CPU and the case 2 2 CLOCK A number of clock frequencies are used on the TP400 Most of these are derived from a 14 318MHz crystal and a synthesiser chip that generates other required frequencies Several 33MHz clocks are generated These are fed to the PCI bus and to the Geode GX1 and CS5530A chip The Geode GX1 incorpo...

Page 26: ...present and configures the internal Geode GX1 registers accordingly Registers within the Geode GX1 chip allow SDRAM timing to be optimised according to CPU speed and SDRAM access time At reset the SDRAM timing defaults to the slowest case and the BIOS then optimizes timing for the best performance Some of the SDRAM is taken from the processor and allocated to the graphics controller using a techni...

Page 27: ...ows the user to program various alternative BIOS image files into the Flash memory These utility programs are described in section 6 5 A Flash File System is provided with every TP400 This converts the remaining 1744k bytes of the 2M byte Flash chip into a non volatile read write logical disk drive This Flash disk can contain the MS DOS operating system as well as your application program The Flas...

Page 28: ...for the Flash memory programming program and the Flash File System 32K DFFFF D0000 Available for PC 104 memory mapped boards BIOS Extension code can be located here and optionally shadowed in SDRAM 64K CFFFF CC000 The Flash File System BIOS extension is initially located here before it copies itself to low memory Available for PC 104 bus memory mapped boards if the FFS is not used 16K CBFFF C8000 ...

Page 29: ...bridge and performed on the ISA bus Thus those addresses that are not on board the TP400 are available for peripheral devices on either the PC 104 Plus bus PCI bus peripherals or on the PC 104 bus ISA bus peripherals The PCI bus peripherals get the first option to respond to an access only if there is no PCI response will the accesses be routed to the ISA bus peripherals I O addressing of PC 104 b...

Page 30: ...roller 200 201 Reserved for Game Port 220 22F or 240 24F or 260 26F or 280 28F Sound card compatibility registers if enabled One of these addresses is selected 2E8 2EF COM4 in extra UART chip 2F8 2FF COM2 Serial Port in Super I O chip 330 38B Sound card FM registers 378 37A Parallel Port in Super I O chip 3B4 3B5 VGA Register in Geode GX1 monochrome modes 3BA VGA Register in Geode GX1 monochrome m...

Page 31: ...ial ports The chip selects for these two ports are in turn generated by two of the programmable chip select registers within the Super I O chip Further details of all four serial ports are given in section 3 4 3 4 SERIAL PORTS The TP400 features four serial ports that are accessed as COM1 COM2 COM3 and COM4 The first three are RS 232 ports COM4 provides TTL level transmit and receive data signals ...

Page 32: ...he BIOS does not make use of serial port interrupts but that most comms software packages enable the interrupts and make use of them to increase the speed of serial data transfer 3 4 2 RS 485 Operation As an option COM2 can be re configured as an RS 485 serial port This is done with a solder link on the board see Appendix B for configuration details The COM2 RS 485 port configuration provides eith...

Page 33: ...this section describes how the IrDA would operate if and when the BIOS implements IrDA Contact DSP Design if you have an IrDA application The COM2 serial port can also be configured to operate in one of three infrared modes transmitting and receiving data as infrared light pulses The three modes are IrDA Sharp IR and Consumer IR At present the BIOS only configures the COM2 UART for some of the mod...

Page 34: ...ently used in remote controlled home entertainment equipment RC 5 RC 6 RECS80 NEC and RCA For further information on the IrDA standards see this web site www irda org 3 5 PRINTER PORT The TP400 implements a full function Centronics compatible printer port This port is the MS DOS PRN device The printer port is contained within the PC97317 Super I O chip The printer port features an 8 bit data port ...

Page 35: ...tions and CMOS RAM for storing setup parameters An alarm facility is also provided this allows an interrupt to be generated when a particular time is reached Calendar clock functions are implemented within the PC97317 Super I O chip The calendar clock hardware is read by the BIOS which maintains time and date on behalf of the operating system The BIOS does this in a millennium compliant fashion Th...

Page 36: ...ontents of the CMOS SRAM The battery should be disconnected while the TP400 TCDEVPLUS is in storage Figure 2 gives a suitable circuit for a rechargeable battery back up circuit NOTE This circuit is suitable only when using a NiMH or Nicad battery of the type used on the TCDEVPLUS The circuit shown in Figure 2 is not suitable for Lithium or other non rechargeable battery types The diode and the res...

Page 37: ...ble We are also able to supply an adapter board called the DIS35 26 that allows the 26 way cable to connect to drives with the usual 34 way connector The TCDEVPLUS development system incorporates a complete floppy system including a floppy diskette drive and cable The TCDEVPLUS also provides an IDE disk controller Connection to the TP400 is via the PC 104 bus Users will probably prefer to use the ...

Page 38: ...should take care or contact DSP Design for advice Appendix G contains details of the CF100 The TP400 BIOS automatically identifies the drives connected to the TP400 at power on It ascertains drive parameters numbers of heads cylinders etc as well as allowable transfer speeds that are then used by the BIOS as it accesses the drives These parameters can be over ridden if required using the BIOS Setu...

Page 39: ...aphics controller using a technique referred to as UMA unified memory architecture Up to 4 5M bytes may be allocated to graphics The BIOS allows an appropriate amount to be reserved for graphics in the Advanced Advanced Chipset Control Video Resolution menu The memory taken by each BIOS option is given in Table 4 This memory is used for the display frame buffer for the Geode s unique display buffe...

Page 40: ...x 480 800 x 600 or 1024 x 768 Use the Advanced Advanced Chipset Control Geode GX1 LCD menu item There are two clock frequency options for the 1024 x 768 display Choose the option that gives you the most stable picture Connection to a CRT from the TP400 is made via the 16 way connector J6 Connection to flat panel displays is made through the 40 way 0 05 pitch connector J8 Connection is made from th...

Page 41: ...n as the TFTIF range solve the otherwise tedious problem of wiring between the TP400 and the display These interface boards carry power to the displays from the TP400 and can switch off power to the LCD when the display is placed into a suspend mode The interface boards also convey a backlight enable signal from the TP400 to the display from where it can be taken to the backlight inverter Appendix...

Page 42: ...respond to interrupts and if interrupts are arriving at high speed due to high speed serial comms for example then interrupts can be lost There are a number of solutions to this problem The first is to disable the Geode VGA controller This can be done in the Setup menu in the Advanced Advanced Chipset Control menu Another alternative is to use an external graphics controller board The next option ...

Page 43: ... transmitter If this is done then the transmitter will encode and transmit the signals that are being generated for a local TFT display Connection can be made to the PanelLink signals at connector J7 You will need to connect the TP400 to a PanelLink monitor through twisted pair cable In practice we have found that standard CAT5 Ethernet cable will work but we would recommend a higher quality shiel...

Page 44: ...function or the other The TP400 s external connections are for Line In and Line Out stereo and Microphone In mono The PC speaker PC Beep is also routed through the sound system circuitry and can be mixed with other audio streams and sent out the Line Out outputs The TP400 provides power for the microphone A voltage of about 2 2V is applied to the microphone through a 2k2 resistor 3 13 SPEAKER A PC...

Page 45: ...the correct drivers Thereafter as Windows sees new USB devices being plugged in such as cameras it will ask for the drivers for those devices to be added In accordance with the requirements of the USB specification power is supplied to a USB peripheral through a current limiting circuit There is such a circuit on the TP400 which limits current to about 500mA per USB channel Some users have reporte...

Page 46: ... and LED100 pins of the DP83815 and glows whenever the DP83815 receives valid 10Base T or 100Base T link pulses The yellow LED connects to the LEDACT pin of the DP83815 and glows when the DP83815 transmits or receives a frame A serial EEPROM is connected to the DP83815 The EEPROM is programmed during the manufacturing process It contains the 6 byte Ethernet address IA or Individual Address as well...

Page 47: ...th differential mode where the difference between two inputs can be negative as well as positive Sample software for the A D converter is provided on the TP400 Utilities Disk This software makes measurements using the A D converter The software may be used as a guide to users who wish to write their own A D code A temperature sensor is provided on the TP400 This is mounted underneath the Geode GX1...

Page 48: ... by the Flash File System driver software and the serial EEPROM and analog to digital convertor software and will not normally be accessed by the user Table 7 gives the function of each bit in the Utility Register Following reset all bits are set to logic 1 They have internal pull up resistors fitted The BIOS configures the pins as outputs or inputs When writing to the registers the user should re...

Page 49: ... Flash memory bank switching E4h 0 BA21 For Flash memory bank switching E4h 1 ENFLASH Enables access to the Flash memory chips when 0 E4h 2 not used E4h 3 CSADC To CS pin of the A D converter Active low E4h 4 CSEEPROM To serial EEPROM Active low E4h 5 SK Clock to serial EEPROM and A D Converter E4h 6 SI Data to serial EEPROM and A D Converter E4h 7 SO Data from serial EEPROM and A D converter E4h ...

Page 50: ...ins Some or all of these pins can be connected in parallel and the resulting 5V and GND connected to the power supply This is the way the TP400 would be powered if it was inserted into a motherboard of the user s own design The third option is to provide power to the board through the 50 way I O connector J4 This also includes a number of 5V and GND pins Users should take care to provide power to ...

Page 51: ...uced to PC 104 specifications prior to V2 2 might not mate with V2 2 or V2 3 boards Prior to the V2 2 specification the key positions were not present and J2 could optionally have been a right angled connector The V2 2 and V2 3 specifications do not allow the right angled J2 connector Both the J1 and J2 connectors on the TP400 are mounted vertically The PC 104 specification version 2 3 is availabl...

Page 52: ...I boards are each asserting a single interrupt request on their INTA pin the PCI bridge in the CS5530A chip receives four different interrupt requests one on each of its four INTx pins Table 8 describes the allocation of these point to point signals within a TP400 system This table also notes the allocation of the IDSEL signals to the PCI functions within the CS5530A chip The CS5530A incorporates ...

Page 53: ...ND Pressing this switch momentarily will reset the system 4 4 2 PC 104 Plus Clock and Reset Signals The PC 104 Plus bus provides four 33 3MHz clocks one for each of the possible expansion boards The TP400 can reset the PC 104 Plus bus See section 5 for details The PC 104 Plus bus provides an active low reset signal PCIRST which is asserted whenever the on board hardware reset signal is asserted Th...

Page 54: ...onnected to an on board TP400 peripheral but may be available on the PC 104 or PC 104 Plus buses or else external indicating the interrupt has no on board use The next column indicates whether the Plug and play PnP BIOS is aware of the interrupt requirement of the peripheral The last column indicates whether the IRQ pin is connected to the PC 104 bus connectors Note that this table mentions the on...

Page 55: ...int Processor in Geode GX1 14 On Board Yes Yes IDE Disk Drive 15 External No Yes TABLE 9 INTERRUPT ALLOCATION Note that the serial ports and printer have individual interrupt enable bits within their register sets The default is for these interrupts to be disabled This means that IRQ3 IRQ4 IRQ5 IRQ7 and IRQ9 can be used by other PC 104 or PC 104 Plus boards if the interrupts are not being used by ...

Page 56: ...tands to be the pool of unallocated interrupts It is possible to use a BIOS Setup menu option to influence this allocation This is discussed in section 4 5 3 below The Geode GX1 does not have a dedicated NMI pin so non maskable interrupts are not available on the TP400 s PC 104 bus The SERR and PERR pins however may generate non maskable interrupts which are emulated by SMI code 4 5 3 Plug and Pla...

Page 57: ... in cascade with the other leaving seven DMA channels available DMA channels 0 1 2 and 3 can be used for 8 bit DMA transfers and DMA channels 5 6 and 7 can be used for 16 bit DMA transfers One pair of DMA pins DRQ2 and DACK2 is connected to the on board floppy disk controller as well as to DRQ2 and DACK2 pins on the PC 104 bus If the floppy disk controller is disabled then these pins can be used f...

Page 58: ...IMER A watchdog timer exists on the X5043 The function of a watchdog timer is to reset a computer if the software has crashed The correct operation of the timer relies on software to access the watchdog timer hardware on a regular basis If the software crashes the watchdog timer will not be kicked and so eventually it will time out and reset the computer The watchdog timer function is accessed via...

Page 59: ... be reset by issuing a low going pulse on the RESET line of the J4 connector In this way a system reset can be generated by an external signal or switch The reset switch connects between J4 pins 23 and 24 Pin 24 is the RESET input and pin 23 is a GND pin The TP400 will then force the RESETDRV signal on the PC 104 bus and the PCIRST signal on the PC 104 Plus bus to be asserted The TCDEVPLUS has a p...

Page 60: ...at the keyboard during the boot sequence Section 6 2 contains more information on the Setup program The BIOS is programmed into the Flash memory chip as part of the manufacturing process Note that the system BIOS and BIOS extensions are combined in a single 256k byte file which is programmed into the top 256k bytes of the Flash memory chip The contents of the Flash memory chip can be changed by th...

Page 61: ... disk controllers are amongst those devices that can be enabled and disabled using the Setup program If the floppy and IDE disk controllers on the TCDEVPLUS development system are to be used then the on board controllers should be disabled The default is for the on board disk controllers to be to be enabled to facilitate use of the TCDEVPLUS Development System We recommend that you do not attempt ...

Page 62: ...es are present on the TP400 Utilities Disk The pre configured files include options with and without the Flash File System driver As well as executing BIOS extensions contained within the Flash chip the BIOS also searches the PC 104 and PC 104 Plus buses for BIOS extension EPROMs that might be present elsewhere in the system The BIOS searches on every 2k byte boundary from C0000h to just below the...

Page 63: ...d BIOS extension is the Flash File System BIOS extension The FFS BIOS Extension is 16k bytes in size and is located at address CC000h The Flash File System device allows the Flash memory to be configured as a disk drive as described in section 6 6 The Flash File System is designed for MS DOS and related operating systems It is likely that the Flash File System BIOS extension will not operate with ...

Page 64: ...ate the Flash File System disk in the Flash chip Care must be taken when using this program to program the Flash chip since an error can erase the BIOS which means the TP400 will stop working Should this happen the TCDEVPLUS development system can be used to restore the contents of the Flash chip See the TCDEVPLUS Technical Reference manual for details By default a single 2M byte 29F016 Flash chip...

Page 65: ...ename If the chip and the file differ the address of the first byte that differs is printed together with the values of the differing bytes The default is not to verify o oxxxxxx Start programming the file at this offset from the start of the flash device xxxxxx is a 21 bit 6 hex digit hexadecimal number This parameter defaults to 0 For programming the 256k byte BIOS image file you should use the ...

Page 66: ... it is 256k bytes in size The program then erases the top 256k bytes in the Flash memory and programs and verifies the file In the flexible mode TP3F032 is run with any or all of the following parameters TP3F032 e sxx p filename v filename oxxxxx lxxxxx q dxxxxx cx h e If e is specified the entire device will be erased If e is not specified the device will not be erased The default is to not erase...

Page 67: ...BIOS there are several steps that MUST be undertaken to complete the BIOS update process These steps are listed below 1 Re program the system BIOS as discussed above 2 Re boot by powering the TP400 system off and on Do not use a push button reset or a Ctrl Alt Del reset 3 Enter the Setup program by pressing the F2 key 4 Once in Setup make whatever changes are appropriate 4 If you have a hard disk ...

Page 68: ...ocated every time the TP400 boots The standard TP400 is shipped with the FFS device driver already present in the Flash memory as a BIOS extension and it can be enabled or disabled in the Setup program using the Main menu By default the FFS BIOS extension is disabled in the Setup program The loadable device driver requires the driver to be placed on the boot disk and it is activated by an appropri...

Page 69: ... in its loadable device driver form and a suitable entry in the CONFIG SYS file The loadable device driver is FTP3AMD SYS and the corresponding entry in CONFIG SYS is DEVICE FTP3AMD SYS When the Flash File System driver loads it will display a sign on message to confirm that it has been located 3 Before the Flash File System can be used the Flash disk must be formatted using a dedicated formatting...

Page 70: ...hips 2M bytes or 4M bytes each 6 6 3 Write Operations and Garbage Collection Writes to the Flash disk take longer than reads This is due to the time taken by the Flash memory chip itself to write data into its memory cells When files are deleted the FFS driver does not immediately erase the corresponding Flash memory Instead it marks that memory as being garbage and when the Flash memory approache...

Page 71: ... follows FXRECLM C 28 6 6 4 Flash File System Statistics The TP400 Utilities Disk also contains a useful utility for reporting the status of the flash disk It can be used to find out how much flash memory is available has been used and is recoverable through the garbage collection process FXINFO EXE usage FXINFO EXE drive Where drive is the drive letter of the flash disk e g C The FXINFO utility p...

Page 72: ...turned to the CMOS memory by the BIOS if the CMOS memory contains invalid data during subsequent boot operations When the TP3EE EXE program is run all of the first 128 locations in the CMOS SRAM module are copied to the EEPROM Note the 128 locations are made up of 114 CMOS RAM locations ten real time clock time and date registers and four control registers All 128 are copied to the serial EEPROM A...

Page 73: ...meter The data written is the hexadecimal byte specified by the d parameter The xxx parameter is a hexadecimal number in the range 0 1FFh dxx d defines the data value to be written to the serial EEPROM by the w parameter The xx parameter is a hexadecimal number in the range 0 FFh t t tests the serial EEPROM by writing to every location The previous data is destroyed c c copies the contents of the ...

Page 74: ...neral purpose serial EEPROM program TP3EE EXE can also be used to test the watchdog timer see section 6 8 The watchdog timer is kicked by the toggling of its chip select pin CS which is driven by the Utility Register bit 4 at I O address 0E4h Users might consider taking the CS pin low at one point in their program and taking it high again in a different point This reduces the likelihood that a cra...

Page 75: ...ms and allow for cooler operation and thus greater product reliability The BIOS can manage power autonomously without intervention from higher levels of software It is also compliant with the Advanced Power Management APM specification version 1 2 which can allow APM aware applications and operating systems to influence the power management of the TP400 The BIOS work to support power management ha...

Page 76: ...66 158004 B00 This page is intentionally left blank ...

Page 77: ...panel displays up to 1024 x768 PaneLink transmitter Floppy Disk Controller Drives single 3 5 inch floppy disk drive through 26 way flat flexible cable IDE Disk Controller Drives two IDE devices hard disk drives or CD ROMs Ethernet Controller National Semiconductor DP83815 10 100Base T with external RJ 45 module Serial interface RS 232 COM1 COM2 and COM3 RS 485 full duplex or half duplex option for...

Page 78: ...tandard PC 104 Plus expansion bus connectors male only TP400 must be the top board in a stack 14 way 16 way and 50 way right angle headers for I O A 26 way flat flexible cable for a floppy drive A 44 way 2mm straight connector for IDE drives A 40 way 0 05 connector for flat panels Two 8 pin SIL headers for Ethernet and USB A 4 way right angle power connector and 3 way fan connector SIL PanelLink c...

Page 79: ...can provide a passive heatsink and a heatsink fan combination which may be useful Ultimately cooling is a system design issue and must remain the responsibility of the system design engineer B 2 SDRAM CONFIGURATION The TP400 uses 144 pin SODIMM SDRAM modules for memory The standard TP400 product is delivered as standard with no SDRAM modules fitted Users may buy SODIMM modules from DSP Design or f...

Page 80: ...PCI specification has been extended to include a new signal PME power management event This signal is not defined on the PC 104 Plus specification DSP Design have proposed that a previously reserved pin on the PC 104 Plus connector be allocated to this new signal The pin we recommend is pin C30 In case this pin should be need to be used for a different purpose we have provided a solder link to all...

Page 81: ...nnector J6 pin 8 is used for the analog to digital convertor channel 3 input or the audio codec Line Out Left input Pin 8 is A D convertor ADC3 Fit link Pin 8 is audio codec Line Out Left input Omit link default LK11 A D Converter Reference This link is used to select the source of the VREF input voltage to the analog to digital converter Note that when the link is fitted the on board 5V power sup...

Page 82: ...g RS 485 Link installed LK16 Remote Bootstrap This link needs to be set according to the location of the BIOS It is normally only used in the manufacturing process BIOS is in the Flash memory Install link Default setting BIOS is in off board EPROM Do not install link LK17 Not Present There is no LK17 on the TP400 LK18 PC 104 Plus VI O Selection Sets the VIO voltage on the PC 104 Plus connectors Se...

Page 83: ...released the processor at this speed The 133MHz speed should not be used The changes are made as follows CPU SPEED LK100 LK101 LK102 133MHz test Fit Link Fit Link Fit Link 133MHz Omit Link Fit Link Fit Link 166MHz Fit Link Omit Link Omit Link 200MHz Omit Link Fit Link Omit Link 233MHz Omit Link Omit Link Fit Link 266MHz Omit Link Omit Link Omit Link 300MHz Fit Link default Omit Link default Fit Li...

Page 84: ... OPEN Geode GX1 200MHz 1 6V 1 2 LINK LINK LINK TABLE B3 VCORE VOLTAGE SELECTION LK108 Power Supply Clock This link is factory fitted and must not be changed LK109 Ethernet Serial EEPROM This link is factory fitted and must not be changed LK110 Ethernet TxD Circuit This link is factory fitted and must not be changed LK111 Ethernet PCI Slot Selection This link can be used to select the PCI slot occu...

Page 85: ...nk 1 2 and 3 4 LK114 IDE PDIAG Pin This link is only present on the Rev B TP400 PCB It allows pin 34 of the IDE connector J100 to be connected to GND or to be unconnected By default it is connected to GND which is equivalent to the connection on the Rev A board Connect PDIAG pin to GND Fit Link Default PDIAG is not connected Omit Link ...

Page 86: ...B8 158004 B00 This page is intentionally left blank ...

Page 87: ... B There is one diagram for each side of the two printer circuit boards that make up the TP400 This Appendix includes mechanical drawings of the TP400 showing the position of pin 1 of each connector The drawings are of the REV B00 version of the TP400 The mechanical details are unchanged between the versions with the exception that the PanelLink connector moves very slightly ...

Page 88: ...C2 158004 B00 FIGURE C1 MAIN BOARD TOP COMPONENT PLACEMENT ...

Page 89: ...158004 B00 C3 FIGURE C2 MAIN BOARD BOTTOM COMPONENT PLACEMENT ...

Page 90: ...C4 158004 B00 FIGURE C3 DAUGHTER BOARD TOP COMPONENT PLACEMENT ...

Page 91: ...158004 B00 C5 FIGURE C4 DAUGHTER BOARD BOTTOM COMPONENT PLACEMENT ...

Page 92: ...C6 158004 B00 FIGURE C5 MAIN BOARD MECHANICAL DIMENSIONS ...

Page 93: ...158004 B00 C7 FIGURE C6 DAUGHTER BOARD MECHANICAL DIMENSIONS ...

Page 94: ...C8 158004 B00 This page is intentionally left blank ...

Page 95: ... only one at this time ITEM DESCRIPTION TP400 Standard TP400 processor board with 300MHz processor and without SDRAM TABLE D1 PROCESSOR BOARDS D 2 SDRAM MEMORY MODULES Table D2 lists the SDRAM options The TP400 is shipped without SDRAM so that you can choose the memory capacity that you require The SDRAM is supplied as a 144 pin SODIMM small outline dual in line package PC100 chips are used ITEM D...

Page 96: ...ITEM DESCRIPTION TCDEVPLUS Development System TPPSU 45W power supply PSU xxLEAD Mains Power Lead for TPPSU specify your country so we can provide the correct lead TRM TCDEVPLUS Technical Reference Manual TCDEVPLUS UTILS Floppy disk containing software TP400 Processor board TRM TP400 Technical Reference Manual TP400 UTILS Utility Disks 2 x TB486ET CAB Cable assembly for TP400ET TP300USB TC586HS Hea...

Page 97: ... and twelve outputs TP406 Parallel I O and timer board Forty lines of parallel I O TS400 Four serial interfaces on one board TSYST Board containing a number of functions floppy and IDE disk controllers and serial ports Can be useful to add an extra IDE disk controller to the TP400 TCBLASTER SoundBlaster compatible audio I O board TCVIDEO Video Capture card with high speed PC 104 Plus interface TCM...

Page 98: ...11 40 way cable assembly for TFTIFxx boards connector at both ends length 11 inches EC586 LCA 40 way cable assembly for flat panel displays connector at one end length 10 inches TFT6KIT 6 4 TFT LCD kit including 6 4 high brightness 640 x 480 LCD panel backlight inverter TFTIF31 interface board TFTIF CAB11 40 way ribbon cable and cable for backlight inverter TS6KIT Touchscreen controller kit for 8 ...

Page 99: ... advise you of the current situation ITEM DESCRIPTION CF100 Adapter board allowing Compact Flash cards to be used as an IDE drive CF4M 4M byte Compact Flash memory card CF8M 8M byte Compact Flash memory card CF16M 16M byte Compact Flash memory card CF32M 32M byte Compact Flash memory card CF48M 48M byte Compact Flash memory card CF64M 64M byte Compact Flash memory card CF80M 80M byte Compact Flash...

Page 100: ...D6 158004 B00 This page is intentionally left blank ...

Page 101: ...0 4 x 30 Pin header 2mm J4 I O 50 2 x 25 Rt Angle pin header 0 1 J5 COM3 and COM4 14 2 x 7 Rt Angle pin header 0 1 J6 CRT Audio and A D 16 2 x 8 Rt Angle pin header 0 1 J7 PanelLink Rev A 8 1 x 8 Rev B 10 1 x 10 Hirose DF13 socket J8 LCD Display 40 2 x 20 Straight pin header 0 05 J9 USB 8 1 x 8 Hirose DF13 socket J10 Inter Board 120 2 x 60 Hirose FX8 J11 Inter Board 80 2 x 40 Hirose FX8 TABLE E1 C...

Page 102: ...n assignments for this connector are shown in Table E5 PIN J2 ROW C J2 ROW D 0 0V 0V 1 SBHE MEMCS16 2 SA23 IOCS16 3 SA22 IRQ10 4 SA21 IRQ11 5 SA20 IRQ12 6 SA19 IRQ15 7 SA18 IRQ14 8 SA17 DACK0 9 MEMR DREQ0 10 MEMW DACK5 11 SD8 DRQ5 12 SD9 DACK6 13 SD10 DRQ6 14 SD11 DACK7 15 SD12 DRQ7 16 SD13 5V 17 SD14 MASTER 18 SD15 0V 19 KEY 0V NOTES This connection is not implemented on the TP400 TABLE E3 PC 104...

Page 103: ...15 DRQ3 17 SA14 DACK1 18 SA13 DRQ1 19 SA12 REFRESH 20 SA11 BUSCLK 21 SA10 IRQ7 22 SA9 IRQ6 23 SA8 IRQ5 24 SA7 IRQ4 25 SA6 IRQ3 26 SA5 DACK2 27 SA4 TC 28 SA3 ALE 29 SA2 5V 30 SA1 OSC 31 SA0 0V 32 0V 0V NOTES These connections are not implemented on the TP400 These pins are pulled to logic 1 TABLE E4 PC 104 J1 PIN ASSIGNMENTS Pin 1 of the J1 connector is marked on the PCB silk screen with a 1 and ro...

Page 104: ... 3V 18 IDSEL0 AD20 GND IDSEL1 AD21 IDSEL2 AD22 19 AD24 C BE3 V IO 5V IDSEL3 AD23 20 GND AD26 AD25 GND 21 AD29 5V AD28 AD27 22 5V AD30 GND AD31 23 REQ0 GND REQ1 VI O 5V 24 GND REQ2 5V GNT0 25 GNT1 VI O 5V GNT2 GND 26 5V CLK0 GND CLK1 27 CLK2 5V CLK3 GND 28 GND INTD 5V RST 29 12V INTA INTB INTC 30 12V N C Reserved PME GND 3 3V KEY NOTES These signals are not used on the TP400 They are connected to 5...

Page 105: ...6 Table E7 lists the J4 signal name and also the peripheral to which the signal belongs and the pin number of that peripheral s connector The standard connectors used in PC s for each of the peripherals are Centronics Printer 25 way female D type Keyboard 5 way female circular DIN Mouse 6 pin mini DIN PS 2 style Serial COM1 9 way male D type Serial COM2 9 way male D type Loudspeaker N A Battery N ...

Page 106: ... 24 RESET RESET SWITCH 25 VCC SPEAKER 26 SPKR SPEAKER 27 GND BATTERY 28 BATT BATTERY 29 VCC KEYBOARD 5 30 KBDATA KEYBOARD 2 31 GND KEYBOARD 4 32 KBCLK KEYBOARD 1 33 GND COM2 5 34 RI2 COM2 9 35 DTR2 or RS485 COM2 4 36 CTS2 or RS485 COM2 8 37 TXD2 or RS485 COM2 3 38 RTS2 or RS485 COM2 7 39 RXD2 COM2 2 40 DSR2 COM2 6 41 DCD2 COM2 1 42 GND COM1 5 43 RI1 COM1 9 44 DTR1 COM1 4 45 CTS1 COM1 8 46 TXD1 COM...

Page 107: ...M4 CONNECTOR PIN ASSIGNMENTS E 5 AUDIO A D CONVERTOR AND CRT CONNECTOR Connector J6 is a 16 pin right angle pin header It carries the audio or analog to digital converter signals and the signals for a VGA CRT display Also included on the connector is the Geode GX1 suspend resume signal Note that either the audio signals or the A D converter signals are brought to the connector Thus some pins are g...

Page 108: ...e REV B boards The connector is from the Hirose DF13 family The connector carries four twisted pair signals The REV B board also has power pins suitable for powering an LCD so long as it is close by it is unlikely that the regulation of the power would be adequate at a distance of 10m J7 PIN REV A BOARD J7 PIN REV B BOARD SIGNAL DESCRIPTION 1 3 3V or 5V 2 GND Power for LCD 1 3 TX2 2 4 TX2 TMDS sig...

Page 109: ...ds that DSP Design have prepared for a number of panel types The TV_CLK signal is an optional input to the CS5530A chip It can be used as the timing reference for the graphics sub system therefore enabling the Geode graphics sub system to be synchronised to external TV signals PIN SIGNAL PIN SIGNAL 1 ENABKL 2 ENAVDD 3 GND 4 SHFCLK 5 GND 6 LCD_HSYNC 7 GND 8 LCD_VSYNC 9 TV_CLK 10 FP_CLK_EVEN 11 RED0...

Page 110: ...osite sync signal ENAVDD Power sequencing control for VDD High to switch on power ENABKL Power control for backlight inverter High to switch on power TABLE E12 FUNCTION OF FLAT PANEL SIGNALS E 8 USB CONNECTOR Connector J9 is an 8 way SIL header It carries the USB signals to a remote PCB the TP300USB which carries the USB connectors The connector is from the Hirose DF13 family J9 PIN SIGNAL 1 Port ...

Page 111: ...L PIN SIGNAL 1 RESET 2 GND 3 ID7 4 ID8 5 ID6 6 ID9 7 ID5 8 ID10 9 ID4 10 ID11 11 ID3 12 ID12 13 ID2 14 ID13 15 ID1 16 ID14 17 ID0 18 ID15 19 GND 20 N C 21 DREQ 22 GND 23 IOW 24 GND 25 IOR 26 GND 27 IOCHRDY 28 GND 29 DACK 30 GND 31 IRQ14 32 IOCS16 33 A1 34 To LK114 35 A0 36 A2 37 CS0 38 CS1 39 N C 40 GND 41 VCC 42 VCC 43 GND 44 VCC Notes Pin 32 is not connected to the Geode GX1 chip set It is pulle...

Page 112: ...he J103 connector can be identified by a small 26 on the top of the plastic molding of the connector PIN SIGNAL PIN SIGNAL 1 VCC 2 INDEX 3 VCC 4 DS0 5 VCC 6 DSKCHG 7 N C 8 N C 9 N C 10 M0 11 N C 12 DIRC 13 N C 14 STEP 15 GND 16 WD 17 GND 18 WE 19 GND 20 TK00 21 GND 22 WPT 23 GND 24 RDATA 25 GND 26 HS TABLE E15 J103 FLOPPY CONNECTOR PIN ASSIGNMENTS ...

Page 113: ... J101 and J102 connectors can be identified by text reading 1 on the silk screen near pins 1 of the connectors PIN SIGNAL 1 VCC 2 VCC 3 GND 4 GND TABLE E16 J101 POWER SUPPLY CONNECTOR PIN ASSIGNMENTS PIN SIGNAL 1 GND 2 VCC 4 GND TABLE E17 J102 POWER SUPPLY CONNECTOR PIN ASSIGNMENTS E 12 ETHERNET CONNECTOR Connector J106 is an 8 way SIL header It carries the Ethernet controller signals to a remote ...

Page 114: ...30_GNT 87 AD29 28 VCC 88 AD28 29 AD20 89 AD31 30 AD25 90 5530_REQ 31 AD30 91 SUSP 32 FRAME 92 CPU_RST 33 IRQ13 93 VCC 34 IDE_DATA6 94 SERIALP 35 GND 95 SUSPA 36 IDE_DATA7 96 GND 37 GND 97 HOLD_REQ 38 IDE_DATA8 98 INTR 39 VCC 99 GND 40 IDE_ADR2 100 SMI 41 IDE_DATA11 101 IDE_IOR0 42 IDE_DATA1 102 IDE_IOW0 43 GND 103 IDE_DACK0 44 ETCLK 104 IDE_ADR1 45 GND 105 VCC 46 GNT0 106 IDE_ADR0 47 REQ1 107 VCC ...

Page 115: ...V3 16 VID_DATA2 56 RDATA 17 VID_VAL 57 RESET 18 VID_DATA3 58 TK00 19 VID_DATA0 59 3V3 20 VID_DATA6 60 PIXEL20 21 VID_DATA5 61 PIXEL13 22 3V3 62 PME 23 VID_CLK 63 PIXEL6 24 GND 64 GND 25 CRT_HSYNC_IN 65 GND 26 FP_VSYNC_IN 66 GND 27 FP_HSYNC_IN 67 N C 28 CRT_VSYNC_IN 68 PIXEL15 29 3V3 69 PIXEL21 30 ENA_DISP 70 PIXEL19 31 N C 71 PIXEL18 32 GND 72 PIXEL11 33 PIXEL4 73 GND 34 PIXEL2 74 PIXEL3 35 3V3 75...

Page 116: ...E16 158004 B00 This page is intentionally left blank ...

Page 117: ...lectronics 800 x 600 3 3V DF9 41S 1V TFTIF31 LQ10D42 LQ64D341 Sharp 640 x 480 5V 5V DF9 31S 1V LQ12S41 Sharp 800 x 600 3 3V DF9 41S 1V TFTIF41 LM151X2 LM151X4 LG Electronics 1024 x 768 3 3V DF9 41S 1V TFTIFS15 HLD1506 HLD1508 HLD1510 Hosiden Philips 1024 x 768 5V FX8 80S SV TABLE F1 TFTIF BOARDS AND THEIR DISPLAYS Although originally designed for 800 x 600 displays the TFTIF41 is also able to driv...

Page 118: ...g the red pin 1 marker with the pin 1 marker on the TFTIFxx connector Now connect the other end of the ribbon cable to connector J8 on the TP400 again checking that pin 1 on the cable mates with pin 1 on the TP400 Connect a backlight inverter to the TFT LCD Take care with the backlight inverter as it produces a very high voltage several hundred volts You may wish to connect the enable pin on the b...

Page 119: ...9 GREEN 2 20 GREEN 3 21 GREEN 4 22 GREEN 5 23 GND 24 GND 25 GND 26 BLUE 0 27 BLUE 1 28 BLUE 2 29 BLUE 3 30 BLUE 4 31 BLUE 5 32 GND 33 GND 34 GND 35 ENABLE 36 VCC 37 VCC 38 N C 39 N C 40 GND 41 GND TABLE F2 TFTIF DISPLAY PIN ASSIGNMENTS The TFTIF has one solder link LK1 This can be set to one of two positions The position marked 5 is for 5V LCD panel The position marked 3 3 is for 3 3V displays You...

Page 120: ... positions The position marked 5 is for 5V LCD displays The position marked 3 3 is for 3 3V panels You may need to change the solder link to match your display The Sharp LQ12S41 uses 3 3V and the board is linked in this position by default LK2 and LK3 are connected to the 41 way connector pins 41 and 38 respectively The links can be used to change the display orientation at least on some Sharp dis...

Page 121: ... 17 GREEN 4 18 GREEN 5 19 GND 20 BLUE 0 21 BLUE 1 22 BLUE 2 23 BLUE 3 24 BLUE 4 25 BLUE 5 26 GND 27 ENABLE 28 LCD VCC 29 LCD VCC 30 RIGHT LEFT 31 UP DOWN TABLE F5 TFTIF31 DISPLAY PIN ASSIGNMENTS The TFTIF31 has three solder links LK1 can be set to one of two positions The position marked 5 is for 5V LCD displays The position marked 3 3 is for 3 3V panels You may need to change the solder link to m...

Page 122: ... allowing suitable connections to be made LK2 PIN LK2 CONNECTION LK3 PIN LK3 CONNECTION 1 GND 1 GND 2 PIN 30 2 PIN 31 3 LCDVCC 3 LCDVCC TABLE F6 TFTIF31 SOLDER LINK CONNECTIONS The ENABLK signal can be taken to a backlight inverter from connector J3 J3 is a Molex 53261 0290 connector Pin assignments are given in Table F7 ENABKL is logic 1 to turn on this inverter PIN SIGNAL 1 VCC 2 ENABKL 3 GND TA...

Page 123: ...s sourced from connector J4 Because the Hosiden display may require significant current DSP Design recommend that the display is powered via J4 Pin assignments of connector J4 are given in Table F8 J4 PIN SIGNAL 1 5V 2 5V 3 GND 4 GND 5 N C 6 VCC from TP400 7 ENABKL 8 GND TABLE F8 TFTIFS15 J4 PIN ASSIGNMENTS The ENABKL signal can be taken to a backlight inverter from connector J3 J3 is a Molex 5326...

Page 124: ...BA3 P1 29 BA4 P2 30 BA5 P3 31 GND 32 GND 33 GND 34 RB0 35 RB1 36 GND 37 RB2 P20 38 RB3 P21 39 RB4 P22 40 RB5 P23 41 GND 42 GND 43 GND 44 GB0 45 GB1 46 GND 47 GB2 P12 48 GB3 P13 49 GB4 P14 50 GB5 P15 51 GND 52 GND 53 GND 54 BB0 55 BB1 56 GND 57 BB2 P4 58 BB3 P5 59 BB4 P6 60 BB5 P7 61 GND 62 GND 63 CLK SHFCLK 64 GND 65 GND 66 HS LP 67 GND 68 GND 69 DE ENABLE 70 VS FLM 71 LCDVCC 72 LCDVCC 73 LCDVCC 7...

Page 125: ...ld take care or contact DSP Design for advice The Compact Flash cards can be removed from the CF100 and read or written to on a desk top PC A reader writer unit is available that plugs into the printer port of a PC to do this G 2 INSTALLING THE CF100 ONTO THE TP400 The CF100 has three connectors The Compact Flash connector J1 is the Compact Flash card connector Due to connector polarisation it is ...

Page 126: ... TP400 and some panel mounting applications The EC586 IDECA is 300mm long and thus suitable for longer panel mounting applications G 3 INSTALLING THE COMPACT FLASH CARD INTO THE CF100 This is simplicity itself The Compact Flash cards can only be inserted into the CF100 J1 connector one way That is incorrect card insertion is not possible Push the Compact Flash card into the CF100 J1 connector all ...

Page 127: ...d and removed while the host computer is powered on this must not be done with the TP400 since the TP400 BIOS and operating systems assume that a hard disk drive is present permanently Removing or changing a Compact Flash card while the TP400 is powered on may confuse software and corrupt data on the disks G 5 2 Formatting and Making the Card Bootable The Compact Flash cards come ready formatted w...

Page 128: ... snap on ejector mechanism for the Compact Flash socket The Compact Flash cards can be removed from the CF100 and read or written to on a desk top PC A reader writer unit is available that plugs into the printer port of a PC to do this Drivers from Windows 95 Windows 98 and Windows NT are provided for this reader writer unit The DSP Design part number is CFREADER Two 44 way ribbon cables are also ...

Page 129: ...f of AT T Bell Labs and was the research arm of the Bell Operating Companies The organisation has recently been renamed Telcordia Bellcore previously used MIL HDBK 217 for their reliability predictions but found that 217 gave pessimistic numbers for its commercial quality products A few years ago 1985 Bellcore used 217 as a starting point modified and simplified the models to better reflect their ...

Page 130: ... be noted that the Flash memory in the TP400 is expected to withstand 1 000 000 write erase cycles per sector If very frequent file management and update tasks using the Flash memory for storage are implemented within the application an estimate of the write erase cycle frequency on the reliability of the TP400 will have to be calculated over the expected life of the unit For example if each secto...

Page 131: ...the failure rate The highest failure rate item in the TP400 at 75ºC is the switch mode PSU chip LT1506CR 3 3SYNC accounting for 5 5 of the overall failure rate The next highest the Geode GX1 processor accounts for 5 1 of the failure rate These figures are not at all excessive given the range of complexity of the components used H 3 RELIABILITY DATA The reliability calculations are presented in Tab...

Page 132: ... T im e T o F a ilu re 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 2 5 3 5 4 5 5 5 6 5 7 5 T e m p e ra tu re Ye a rs B e n ig n F ix e d M o b ile U n it F a ilu re R a te p e r a n n u m 0 0 2 0 4 0 6 0 8 1 1 2 2 5 3 5 4 5 5 5 6 5 7 5 T e m p e ra tu re Fa ilure s pe r a nnum B e n ig n F ix e d M o b ile ...

Page 133: ...08899 69633 35 0 02619 0 05241 0 1572 334427 167123 55707 40 0 03274 0 06548 0 1964 267558 133779 44593 45 0 04084 0 08169 0 2450 214448 107224 35741 50 0 05087 0 10174 0 3052 172199 86099 28699 55 0 06320 0 12640 0 3792 138598 69299 23099 60 0 07831 0 15662 0 4699 111856 55928 18642 65 0 09674 0 19349 0 5804 90546 45273 15091 70 0 11912 0 23825 0 7148 73534 36767 12255 75 0 14619 0 29238 0 8772 5...

Page 134: ...H6 164004 C03 This page is Intentionally left blank ...

Page 135: ...Base T or 100Base T link pulses The yellow LED connects to the LEDACT pin of the DP83815 and glows when the DP83815 transmits or receives a frame This Appendix contains the mechanical drawing of the TP400ET allowing users to build their enclosure to accommodate the TP400ET It also includes the circuit of the TP400ET for users who would prefer to design the TP400ET circuitry into their own PCBs Thi...

Page 136: ...J2 164004 C03 FIGURE J1 TP400ET MECHANICAL DRAWINGS FIGURE J2 TP400ET CIRCUIT DIAGRAM ...

Page 137: ...allowing users to build their enclosure to accommodate the TP300USB It also includes the circuit of the TP300USB for users who would prefer to design the TP300USB circuitry into their own PCBs This circuit remains the copyright of DSP Design Limited but DSP Design grants permission for any or all of the circuit to be used by DSP Design customers who are using the circuit together with DSP Design s...

Page 138: ...K2 158004 B00 FIGURE K1 TP300USB MECHANICAL DRAWINGS FIGURE K2 TP300USB CIRCUIT DIAGRAM ...

Page 139: ...ror in the documentation we would appreciate it if you could fill in the form on the next page or a copy of it and return the form to your supplier Prior to returning a faulty product please check the following 1 The board has been correctly configured for the intended application see earlier appendix for board installation details 2 The power supplies are providing correct voltage levels 3 Cablin...

Page 140: ...DIVIDUAL CONTACT SERIAL NO PHONE NO DATE OF RETURN SYMPTOMS OBSERVED DOCUMENTATION ERRORS as applicable IN WHAT CONFIGURATION IS THE BOARD USUALLY USED WHAT OTHER BOARDS WHAT SOFTWARE ETC FOR DSP DESIGN USE ONLY PRODUCT TEST REPORT DATE OF RECEIPT REPAIRED BY CHARGES TO BE INVOICED DATE OF RETURN RETURNED BY ...

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