DIGITAL-LOGIC AG
PCCP5 Manual V2.3
47
I/O Ad-
dress
Read/Write
Status
Description
0064h
R
Keyboard controller read status
bit 7
= 0
No parity error
1
Parity error on keyboard transmission
bit 6
= 0
No timeout
1
Received timeout
bit 5
= 0
No timeout
1
Keyboard transmission timeout
bit 4
= 0
Keyboard inhibited
1
Keyboard not inhibited
bit 3
= 0
Data
1
Command
bit 2
= System flag status
bit 1
= 0
Input buffer empty
1
Input buffer full
bit 0
= 0
Output buffer empty
1
Output buffer full
0064h
W
Keyboard controller input buffer
0070h
R
CMOS RAM index register port and NMI mask
bit 7
= 1
NMI disabled
bits 6-0 = 0
CMOS RAM index
0071h
R / W
CMOS RAM data register port
0080h
R / W
Temporary storage for additional page register
0080h
R
Manufacturing diagnostic port
(this port can access POST
checkpoints)
0081h
R / W
DMA channel 2 address byte 2
0082h
R / W
DMA channel 2 address byte 2
0083h
R / W
DMA channel 1 address byte 2
0084h
R / W
Extra DMA page register
0085h
R / W
Extra DMA page register
0086h
R / W
Extra DMA page register
0087h
R / W
DMA channel 0 address byte 2
0088h
R / W
Extra DMA page register
0089h
R / W
DMA channel 6 address byte 2
008Ah
R / W
DMA channel 7 address byte 2
008Bh
R / W
DMA channel 5 address byte 2
008Ch
R / W
Extra DMA page register
008Dh
R / W
Extra DMA page register
008Eh
R / W
Extra DMA page register
008Fh
R / W
DMA refresh page register
Continued...
