DM9000A
APPLICATION NOTES
Preliminary 20
Version: DM9000A-AN-V121
November 27, 2007
There are two ways to set the power-up/ power-down mode for the internal PHY:
4.3.1 GPR PHYPD Setting
In the MAC registers, the PHYPD bit is used for powering down the internal PHY, and it is
default high "1". If the internal PHY is desired to be activated, the system driver needs to clear
this power-down bit by writing low "0" to PHYPD in the GPR REG. 1FH.
4.3.2 PHY Register Setting
In the PHY registers, the Bit [11] Power-down of the basic mode control register (BMCR REG.
00) can be set high "1" to enable the PHY power-down mode.
