CIRCUIT DESCRIPTION
6-3
Part No. 001-4090-101/102
An 8 channel, 8-bit successive approximation A/D converter, type AD0838 (U9), is interfaced to CPU
(U18) and Peripheral (U20).
U19 generates a power-on reset for the CPU and U6 is a temperature sensor used by the firmware to
compensate for variations in RSSI.
The RSSI signal from the transceiver is amplified and filtered by U7A. The signal is compared to a
threshold value set by digital potentiometer (U5A). The output of the comparator (U7B) is used to change the hold
time of both peak detectors at the beginning of the receive packet.
6.2.6 WAKE-UP CIRCUIT
The wake-up circuit for the Integra-H consists of a 50 ms monostable circuit that is triggered by the rising
edge of a Sleep signal from CPU (U17). The falling edge of this 50 ms pulse (end of pulse) is connected to the
\NMI of the CPU and will wake up the CPU from Sleep mode after 50 ms.
When exiting SLEEP mode on a \NMI, the CPU firmware will increment a counter, then return to Sleep
until it reaches a limit set by a software parameter. When the programmed count is reached the CPU will wake up
the radio and the RS232 driver, program the synthesizer, and watch for channel activity.
While in sleep mode (during the 50 ms pulse), an active RTS from either communication port will reset
(terminate) the 50 ms pulse so that its falling edge will restart the CPU immediately.
The CPU will check to see if either RTS signal is valid each time it is restarted by the \NMI. The firmware
will only start the sleep timer after checking that all “wakeup” inputs are inactive.
6.2.7 POWER SUPPLY
The 13.3-volt DC power input is protected by a 3-amp fuse and reverse-protected by a diode.
A 5 volt, low voltage regulator (U12) is used to power all digital functions and another 5 volt, low voltage
regulator is used to control the 5V_SW voltage in the sleep mode.
