Daewoo DTR-14D3VG, Service Manual

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17
No Name Description
Power-up : If the 8V increases >6.8V then; (after IC-initialization and auto re-calibration)
Hout starts at 2fH
Hout continues at fH
Power-down : If the 8V drops <6.8V then; a power on reset, POR, is generate.
The Hout is disabled immediately and
RGB blanked
IC must be re-initialized for correct re-start of the set
13 INT CVBS INPUT It is recommended that the CVBS1 int and CVBS2 ext input amplitudes are
17 EXT CVBS INPUT 1 Vpp (inclusive sync amplitude).
This, because the noise detector switches the ø1 loop to slow mode
(i.e. auto ø1mode when FOA, FOB = 0,0) when noise level exceeds
100mVrms (i.e. at S/N of 20dB).
14 GROUND All internal circuits are connected to this ground pin 14.
15 AUDIO OUTPUT The output signal is volume controlled and is active for both internal and external audio
signals. The nominal gain is +9dB and -71dB, which gives a total control range of 80dB.
The output signal range therefor is 0.14- 1400mVrms
The bandwidth is >100kHz, the DC level is 3.3V and the output impedance is 250
Ω
.
16 DECOUPLING Voltage variations at pin 16, which can be due to external leakage current or
FILTER TUNING crosstalk from interference sources, should be less than 50mV to ensure that
tuning of filters/delay cells remains correct.
18 BLACK CURRENT For correct operation of the loop CURRENT information is supplied to the
INPUT black current input pin.
19 BLUE OUTPUT The RGB outputs are supplied to the video output stages from pins 21, 20
20 GREEN OUTPUT and 19 respectively.
21 RED OUTPUT For nominal signals (i.e. CVBS/S-VHS, TXT inputs) and for nominal control settings,
then the RGB output Signal amplitudes is typically 2VBLACK_WHITE.
22 V-GUARD INPUT/ Vertical Guard
BEAM CURRENT The TDA835X vertical deflection IC’s have a guard output which generates a pulse
LIMITER during every vertical retrace. This pulse can be monitored by the TDA884X. Whenever
the height of this pulse is larger than 3.65V the vertical deflection IC’s work correctly.
The DC level during scan is not critical, but it should be below the 3.65V detection level.
The vertical guard is controlled by the I
2 C bits EVG and NDF.
When EVG (Enable Vertical Guard) is set to 1, for NDF (No vertical Deflection) = 1
implies deflection failure. The RGB outputs are blanked when NDF = 1.
Beam current limiting
The beam current limiting function is realized by reducing the contrast followed by the
brightness when the beam current reaches a too high level. The circuit can be divided into:
- Peak white limiting (PWL): reacts internally on high local peaks in the RGB signal.
- Average beam current limiting (ABL): reacts on the average picture content. it is an
external function.
23 RED INPUT The Rin, Gin, Bin input signals (nominal signal amplitude of 700mV) are
24 GREEN INPUT AC coupled to pin 23, 24 and 25 respectively.
25 BLUE INPUT Clamping action occurs during burstkey period.
26 RGB INSERTION The table below a survey is given of the three modes which can be selected
SWITCH INPUT with a voltage on RGB insertion switch input pin ;
Vpin26 I
2 C function Selected RGB signal
0.9V-3V IE1=0 RGB (internal)
IE1=1 Rin,Gin,Bin (fast insertion on pin23,24,25)
> 4V IE1=X OSD can be inserted at the RGBout pins