19
No
Name
Description
blanking pulse is only present when the external flyback pulse is fed to this pin.The line
flyback pulse, fed to this pin is used for two functions:
- input signal for the PHI-2 1oop and
- RGB line blanking. (without flyback pulse blanking occurs only during the
burstkey pulse)
Because of the combined input/output function, the connected circuit should be
carefully designed for optimal performance.
Flyback pulse
The selection of the flyback pulse is important. Please note that the flyback pulse
width may not vary on beam current variations because they can not be compensated
by the PHI-2loop.
42
PHI-2 control loop
Loopfilter:
The loopfilter is a first order filter. This pin requires a capacitor(C) only. The recom-
mended value is 4.7nF. The minimal value for C = 1nF. The loopgain than is reduced
to 0dB for 3kHz. A value up to 10nF is allowed but makes the loop slower.
To avoid disturbances in the loop the capacitor should be connected to the TDA884X
ground pin as short as possible.
Loopgain:
The static loopgain (K) is 120µs/µs. This implies that phase variations ( t0) due to stor-
age time variations ( td)are reduced by this factor of 120. This is valid when only a
capacitor is connected to the PHI-2 pin.
Any resistor connected externally reduces the loopgain. For R = 10M
Ω
-> K = 60, and
for R = 1M
Ω
-> K = 12.
Shift control range:
The picture can be centered on screen by means of the horizontal shift (HS) via I2C
bus. The range is +/-2µs.
The delay between the positive going Hout (line transistor switches off then) and start
burstkey pulse (ref PHI-2) must be
≤
17µs.
Flash protection:
A flash protection becomes active when this pin is forced >6V. The horizontal drive is
switched-off immediately. Once the voltage is <6V the horizontal drive is switched-on
again via the slow start procedure.
A series resistor of 1k
Ω
is required for current limitation.
See also XPR function for overvoltage protection.
PHI-2 switched off:
The PHI-2 loop is switched off when the PHI-2 pin is forced externally to 1V. This is for
analysis purpose only.
43
PHI-1 control loop
The loopfilter connected to pin 43 is suitable for various signal conditions as
strong/weak and VCR signal.
This is achieved by switching of the loopfilter time constant by changing the
PHI-1 output current.
Via I
2
C bus FOA/B, different time constants can be chosen, including an
automatic mode which gives optimal performance under varying conditions.
44
GROUND
To this pin are connected the IC-substrate and horizontal output.
45
AVL output
The AVL capacitor is connected to pin 45. The recommended capacitor value is 1 to
4.7µF; it’s optimal value is a compromise between fast volume settling, AVL hold time
(dynamic sound range) and harmonic distortion.
- small AVL capacitor: gives fast volume settling but reduces the dynamic sound
range and performance on harmonic distortion for mainly low audio frequencies
- large AVL capacitor value gives maximal AVL performance but increases the
volume settling time.
The active control range for pin 45 is 1V for maximum gain and 5 V for minimal gain.
During channel switching it’s recommended to force a sound mute (make SM=1). The
AVL then can’t be disturbed by noise peaks during channel setting; this ensures a fast
setting of the volume level.
Summary of Contents for DTR-14D3VG
Page 5: ...3 Circuit Block Diagram...
Page 10: ...8 3 Block Diagram...
Page 66: ...64 1 14D3 Mechanical Exploded View...
Page 67: ...65 2 20D3...
Page 68: ...66 3 21D3...
Page 69: ...67 4 16D3...
Page 70: ...67 Printed Circuit Boards...
Page 71: ...Circuit Schematics CP 490 SCHEMATIC DIAGRAM...
Page 72: ...ENGINEER NOTE...