CY4636 WirelessUSB™ LP Keyboard Mouse Reference Design Kit User Guide, Doc. # 001-70355 Rev. *A
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Hardware
4.2.1.1
Chip CYRF6936
Figure 4-12. Schematic Chip View of the CYRF6936 Chip
Refer to the pin details of the CYRF6936 chip in
Table 4-1 on page 27
.
4.2.1.2
CY7C60323 Chip
The enCoRe III Low Voltage (enCoRe III LV) CY7C603xx device is based on the flexible PSoC archi-
tecture. A simple set of peripherals is supported that can be configured as required to match the
needs of each application. Additionally, a fast CPU, flash program memory, SRAM data memory, and
configurable I/Os are included.
The enCoRe III LV core is a powerful engine that supports a rich feature set. It encompasses SRAM
for data storage, an interrupt controller, sleep and watchdog timers, internal main oscillator (IMO),
and internal low-speed oscillator (ILO).
The CPU core, called the M8C, is a powerful processor with speeds up to 12 MHz. The M8C is a
four MIPS 8-bit Harvard architecture microprocessor. The core includes a CPU, memory, clocks, and
configurable general purpose I/Os (GPIOs).
System resources provide additional capability, such as digital clocks to increase flexibility, I2C func-
tionality for implementing an I2C master, slave, multimaster, an internal voltage reference that pro-
vides an absolute value of 1.3 V to a number of subsystems, a switch mode pump (SMP) that
generates normal operating voltages off a single battery cell, and various system resets supported
by the M8C.
