Cronologic Ndigo5G-10, User Manual

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4 Packet Format
4.0.1 Output Structure ndigo packet
unsigned char channel
0 to 3 for the ADC input channels, 4 for the TDC, 5 for the timestamp channel.
unsigned char card
Identifies the source card in case there are multiple boards present. Defaults to 0 if no value is
assigned to the parameter
board id in Structure ndigo init parameters or set via
int ndigo set board id(ndigo device *device, int board id) .
unsigned char type
For the ADC channels this is set to 1 to signify 16 bit signed data.
For the TDC channel it is set to 8 to signify 64 bit unsigned data.
If the type field is 128 or greater then there is no data present, even if length is not 0. In this
cases the length field may contain other data.
Type Length Field Description
1 Number of payload words 16 bit signed samples from one of the ADCs
8 Number of payload words 64 Bit unsigned TDC Data, only for internal processing
128 Bit pattern of trigger sources Whenever at least one of the sources that is enabled for the
timestamp channel triggers, one of these packets is generated.
The length field contains the triggers active when this packet
was created.
unsigned char flags
#define NDIGO PACKET FLAG SHORTENED 1
If the bit with weight 1 is set, the packet was truncated because the internal FIFO was full.
Less than the requested number of samples have been written due to the full FIFO.
#define NDIGO PACKET FLAG PACKETS LOST 2
If the bit with weight 2 is set, there are lost triggers immediately preceding this packet due
to insufficient DMA buffers. The DMA controller has discarded packets due to full host buffer.
#define NDIGO PACKET FLAG OVERFLOW 4
If the bit with weight 4 is set, the packet contains ADC sample overflows.
#define NDIGO PACKET FLAG TRIGGER MISSED 8
If the bit with weight 8 is set, there are lost triggers immediately preceding this packet due
to insufficient buffers. The trigger unit has discarded packets due to full FIFO.
#define NDIGO PACKET FLAG DMA FIFO FULL 16
If the bit with weight 16 is set, the internal DMA FIFO was full. Triggers only got lost if a
subsequent package has the bit with weight 8 set.
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