+0,25V
analog_offset[i] = 0V
-0,25V
+0,25V
analog_offset[i] = 0,1V
-0,25V
0,1V
Figure 2.5: Users can add analog offset to the input before sampling
+0,25V
analog_offset[i] = 0V
-0,25V
+0,25V
analog_offset[i] = 0,22V
-0,25V
0,22V
Figure 2.6: Asymmetric signal shifted to increase dynamic range
2.2.3 Digital Inputs
There are two digital inputs on the front slot cover called Trigger and GATE.
Both inputs provide a digital input signal routed to the trigger matrix. These signals can be
used to trigger any of the trigger state machines and gating blocks. The inputs are AC coupled.
DC offset is configurable via the
dc offset
parameter in the configurations structure to support
positive and negative input pulses.
The configuration is set via the structures trigger[8] and trigger[9] in the configuration struc-
ture. The input circuit is shown in Figure
on page
TDC on Trigger Input
There is a TDC connected to the Trigger input. When used with the TDC, the Trigger input
supports negative pulses only . The TDC creates packets of type 8. These packets first contain
a coarse timestamp and a payload that can be used to calculate the trigger position with higher
precision. The function
ndigo process tdc packet()
can be used to replace the coarse timestamp
with the precise timestamp. This function is described in section
on page
. TDC pulses
must have a minimum duration of 3.3ns. The dead-time of the TDC is 32ns.
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