Programming
BUF-PCI(PC), BUF-PCI(98)
80
Interrupt request status register (+FAh tFBh) [input]
D7
D6
D5
D4
D3
D2
D1
D0
+250
IRQ7
IRQ6(INT2) IRQ5(INT1)
IRQ4
IRQ3(INT0)
(+FAh)
Status
Status
Status
Status
Status
+251
IRQ15
IRQ14
(INT6)
IRQ12(INT5)
IRQ11
IRQ10(INT4) IRQ9(INT3)
(+FBh)
Status
Status
Status
Status
Status
Status
Status
0
0
0
0
Senses an interrupt request from a board in the I/O expansion unit.
When an interrupt request generates from a board in the I/O expansion
unit, the bit that caused the generation is set to 1. The interrupt request
status reset register allows resetting bit by bit.
When issuing an interrupt request to the PC, be sure to verify the bit that
caused the generation in the interrupt handler.
When the power is turned on, the register is undefined.
Parentheses indicate notation of the C-bus interrupt request signal.
Interrupt request status reset register
(+FAh tFBh) [output]
D7
D6
D5
D4
D3
D2
D1
D0
+250
IRQ7
IRQ6(INT2) IRQ5(INT1)
IRQ4
IRQ3(INT0)
(+FAh)
Reset
Reset
Reset
Reset
Reset
+251
IRQ15
IRQ14
(INT6)
IRQ12(INT5)
IRQ11
IRQ10(INT4) IRQ9(INT3)
(+FBh)
Reset
Reset
Reset
Reset
Reset
Reset
Reset
0
0
0
0
Resets the interrupt request status register bit by bit.
The reset interrupt request status register can monitor the next interrupt
request.
When issuing an interrupt request to the PC, be sure to reset the bit that
caused the generation in the interrupt handler.
Parentheses indicate notation of the C-bus interrupt request signal.