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2017
congatec
AG
QA50m10
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The following I/O decode ranges are fixed to the LPC Bus:
2Eh - 2Fh
4Eh - 4Fh
200h - 20Fh
2F8h - 2FFh
3F8h - 3FFh
378h - 37Fh
778h - 77Fh
3F0h - 3F5h
3F7h, 60h, 62h, 64h, 66h
Parts of these ranges are not available if Super I/O is used on the carrier board. If Super I/O is not implemented on the carrier board, then
all these ranges are available for customer use. If you require additional LPC Bus resources other than those mentioned above, or more
information about this subject, contact congatec technical support for assistance.
9.2
PCI Configuration Space Map
Table 33
PCI Configuration Space Map
Bus Number (hex) Device Number (hex) Function Number (hex) Device ID Description and Device ID
00h
00h
00h
0x5AF0
Host Bridge
00h
02h
00h
0x5A84
Graphics and Display
00h
0Dh
00h
0x5A92
Primary to SideBand Bridge
00h
0Dh
01h
0x5A94
PMC (Power Management Controller)
00h
0Dh
02h
0x5A96
Fast SPI
00h
0Dh
03h
0x5AEC
Shared SRAM
00h
0Eh
00h
0x5A98
HDA
00h
0Fh
00h
0x5A9A
Simple Communication Controller 0
00h
0Fh
01h
0x5A9C
Simple Communication Controller 1
00h
0Fh
02h
0x5A9E
Simple Communication Controller 2
00h
012h
00h
0x5AE3
SATA
00h
013h
00h
0x5AD8
PCIe -A0
00h
013h
01h
0x5AD9
PCIe -A11
00h
013h
02h
0x5ADA
PCIe -A21
00h
013h
03h
0x5ADB
PCIe -A31
00h
014h
00h
0x5AD6
PCIe -B0
00h
015h
00h
0x5AA8
USB-Host (xHCI)
00h
015h
01h
0x5AAA
USB-Host (xDCI)
00h
016h
00h
0x5AAC
I2C 03