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2014
congatec
AG
TA30m16
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5.1.11
SD Card
The conga-TCA3 offers a 4-bit SD interface for SD/MMC cards on the A–B connector. The SD signals are multiplexed with GPIO signals and
controlled by the congatec Board Controller. The SD card controller in the Storage Control Cluster of the SoC supports the SD interface with
up to 832 Mb/s data rate, using four parallel data lines.
5.1.12
LPC Bus
The conga-TCA3 offers the LPC (Low Pin Count) bus on the A–B connector. For more information about the decoded LPC addresses, see
section 9.1.1 "LPC Bus"
.
Note
The conga-TCA3 Atom variants operate at 33 MHz and the Celeron variants at 25 MHz.
5.1.13
I²C Bus
The I²C bus is implemented through the congatec board controller. It provides a fast-mode, multi-master I²C bus at maximum I²C bandwidth.
5.1.14
SPI
The conga-TCA5 supports SPI interface. This interface makes it possible to boot from an external SPI flash (alternative interface for the BIOS
flash device).
5.1.15
Power Control
PWR_OK
Power OK from main power supply or carrier board voltage regulator circuitry. A high value indicates that the power is good and the module
can start its onboard power sequencing.
Carrier board hardware must drive this signal low until all power rails and clocks are stable. Releasing PWR_OK too early or not driving it low
at all can cause numerous boot up problems. It is a good design practice to delay the PWR_OK signal a little (typically 100 ms) after all carrier
board power rails are up, to ensure a stable system. A sample screenshot is shown below.
