CMOSTEK CMT2189C, User Manualline

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AN202
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Contents
1 Chip Architecture Introduction ............................................................................................................... 5
1.1 Overall Operation Principle ......................................................................................................... 5
1.2 IO Pin Description ....................................................................................................................... 6
2 RF Configuration and Control Mechanism ............................................................................................ 8
2.1 Operation Status ......................................................................................................................... 8
2.2 Transmitting Control Timing ........................................................................................................ 8
2.3 TWI Configuration Bus
（
Two-wire Interface
）
........................................................................... 9
2.4 TWI timing Requirement ............................................................................................................ 11
2.5 TWI Timing Enter and Exit ........................................................................................................ 12
2.6 TWI Configuration Process ....................................................................................................... 13
2.7 Complete Transmission Process .............................................................................................. 14
3 Program Memory ................................................................................................................................... 16
4 Special Function Register(SFR) ........................................................................................................... 17
4.1 Address Mapping ...................................................................................................................... 17
4.1.1 Bank0 SFR ........................................................................................................................ 17
4.1.2 Bank1 SFR ........................................................................................................................ 18
4.1.3 TMR0
（
Addr:0x01
）
......................................................................................................... 19
4.1.4 STATUS
（
Addr:0x03
）
..................................................................................................... 19
4.1.5 PORTA
（
Addr:0x05
）
....................................................................................................... 20
4.1.6 PORTC
（
Addr:0x07
）
...................................................................................................... 21
4.1.7 INTCON
（
Addr:0x0B
）
..................................................................................................... 21
4.1.8 PIR1
（
Addr:0x0C
）
.......................................................................................................... 22
4.1.9 TMR2
（
Addr:0x11
）
......................................................................................................... 23
4.1.10 T2CON
（
Addr:0x12
）
....................................................................................................... 23
4.1.11 WDTCON
（
Addr:0x18
）
.................................................................................................. 24
4.1.12 CMCON0
（
Addr:0x19
）
................................................................................................... 25
4.1.13 PR0
（
Addr:0x1A
）
........................................................................................................... 26
4.1.14 MSCKCON
（
Addr:0x1B
）
................................................................................................ 26
4.1.15 SOSCPR
（
Addr:0x1C/0x1D
）
......................................................................................... 27
4.1.16 OPTION
（
Addr:0x81
）
..................................................................................................... 27
4.1.17 TRISA
（
Addr:0x85
）
........................................................................................................ 28
4.1.18 TRISC
（
Addr:0x87
）
........................................................................................................ 29
4.1.19 PIE1
（
Addr:0x8C
）
.......................................................................................................... 29
4.1.20 PCON
（
Addr:0x8E
）
........................................................................................................ 30