DS1113F1
95
CS4399
8 PCB Layout Considerations
8 PCB Layout Considerations
The following sections provide general guidelines for PCB layout to ensure the best performance of the CS4399.
8.1 Power Supply
As with any high-resolution converter, the CS4399 requires careful attention to power supply and grounding arrangements
if its potential performance is to be realized.
shows the recommended power arrangements with VA and VCP
connected to independent clean supplies. VL and VD, which power the digital circuitry, may be run from the shared system
logic supply.
8.2 Grounding
Note the following:
• Extensive use of power and ground planes, ground-plane fill in unused areas, and surface-mount decoupling
capacitors are recommended.
• Decoupling capacitors must be as close as possible to the CS4399 pins.
• To minimize inductance effects, the low-value ceramic capacitor must be closest to the pin and mounted on the
same side of the board as the CS4399.
• To avoid unwanted coupling into the modulators, all signals, especially clocks, must be isolated from the FILT+ and
FILT- pins.
• The FILT+ capacitors must be positioned to minimize the electrical path from the pin to VA.
• The FILT– capacitors must be positioned to minimize the electrical path from the pin to –VA.
• The V and VCP_FILT– capacitors must be positioned to minimize the electrical path from each respective
pin to GNDCP.
8.3 REFA and REFB Routing
For best interchannel isolation performance, REFA and REFB must be routed independently to the headphone connector
reference pin. The REFA and REFB are electrically connected to system’s ground plane through via at the headphone
connector ground pin.
illustrates the recommended arrangements.
For interfacing the REFA and REFB pins with an IC that performs alternate pinout headset detect functions, both signals
must be routed independently to the CS4399’s ground pin connecting the detected headset ground pole. Follow the
recommended grounding scheme of the CS4399.
8.4 QFN Thermal Pad
The CS4399 comes in a compact QFN package, the underside of which reveals a large metal pad that serves as a thermal
relief to provide maximum heat dissipation. This pad must mate with an matching copper pad on the PCB and must be
electrically connected to ground. A series of vias must be used to connect this copper pad to one or more larger ground
planes on other PCB layers. For best performance in split-ground systems, connect this thermal pad to GNDA.