PMCDIO64
Copyright
2000 BVM Ltd.
6
3.4 I/O
Interface
The 64-bits of I/O are connected to the outside world via 74ABT16245A buffer devices with 2 bytes
per device with separate output enables. These buffer devices have a 32mA source capability or
64mA sink capability when connected to outside signals. The I/O signals may be biased with 10K
Ω
pull-up resistors on a per byte basis.
There are 4 common connections which can be used as power sources or ground returns for the I/O
signals - see section "5.2.2 LK9 to LK12 P5 Common Select (on page 9)" for further details.
3.5 93CS56
EEPROM
The PMCDIO64 is fitted with a 93CS56 EEPROM which is supplied pre-programmed by BVM. The
contents of this EEPROM are read by the PCI9030 on coming out of reset and are used to set up the
control registers after reset, configuring the PCI interface configuration, PCI Device/Vendor ID's &
various other board specific parameters. See section "7.1 PCI Configuration Details (on page 13)" and
"A.1 PCI9030 PCI Interface (on page 17)" for further details.
3.6 18V256
EEPROM
The PMCDIO64 is fitted with a 18V256 EEPROM, which is supplied pre-programmed by BVM. The
contents of this EEPROM are read by the SpartanXL FPGA on power up and are used to initialise the
logic functions in the FPGA.
