INSTALLATION AND OPERATION GUIDE
XIP-3901 | 17
2.2.4 Functional Block Diagram
Upgrade, configuration and Control
DENSITÉ 3+ FR4 STD / ADV
1GbE
ETH3
DENSITÉ CONTROL
XIP-3901-UDC-IP Dual Channel 4K UHD IP Processing Application
PTP BMCA
Genlock
XIP-3901-UDC-HDR
OPTIONAL LICENSES:
Up/Down/
Cross/
Pass
HDR
Processor
Audio
Level
Up/Down
Mixer
Tone
Shuffler/
Mixer
Alignment
+ fix delay
Match/Fix
delay
Match/Fix
delay
Timecode
Processor/
Generator
ST
2110
Encap
With
-7
Dual
TX
HD/UHD
2110-40
2110-30/31
Level C
2110-40
2110-20/21
HD/UHD
Tx
25GbE
Rx
25GbE
NMOS IS-04/IS-05
ST 2059
Time Stamps
Reference
1GbE
UHD/HD Video Processor 1
XIP-3901-UDC-AUD
2110-30/31
Level C
UHD/HD Video Processor 2
(same as Processor 1)
ST
2110
Decap
With
-7
Dual
Rx
Hitless
Proc Amp/
Color Correct/
Legalizer
Pass/block
HD Monitoring*
Color-
Bar
2110-20
* Available on Processor 1 only
Rx
Tx
Tx
Rx
Rx
Tx
25GbE
25GbE
Figure 8
XIP-3901-UDC-IP Functional Block Diagram