Beckhoff FC3101, Documentation

Page: 23 / 76

FC310x as master
FC3101 and FC3102 23 Version: 3.0
Offset Description
0 -3
Max. TwinCAT jitter (in 100 ns, see tab EquiDiag [ } 46] (TwinCAT 2.8) or MC-
Diag [ } 46] (TwinCAT 2.9))
4 - 7
Min. mapping time (in 100 ns, see tab EquiDiag [
}
46] (TwinCAT 2.8) or MC-Diag
[
}
46] (TwinCAT 2.9))
8 - 11
Min. mapping time (in 100 ns, see tab EquiDiag [
}
46] (TwinCAT 2.8) or MC-Diag
[
}
46] (TwinCAT 2.9))
12 - 15
Max. FC310x jitter (in FC310x ticks, see tab EquiDiag [
}
46] (TwinCAT 2.8) or
MC-Diag [
}
46] (TwinCAT 2.9))
16 - 19
CycleWithNoDxch counter (see tab GeneralDiag [
}
44] (TwinCAT 2.8) or DP-Diag
[
}
44] (TwinCAT 2.9))
20 - 23
CycleWithRepeat counter (see tab GeneralDiag [
}
44] (TwinCAT 2.8) or DP-Diag
[
}
44] (TwinCAT 2.9))
24 - 27
Max. repeater/cycle (see tab GeneralDiag [
}
44] (TwinCAT 2.8) or DP-Diag [
}
44]
(TwinCAT 2.9))
28 - 31
Actual cycle time (in 4/25 µs, see tab GeneralDiag [ } 44] (TwinCAT 2.8) or DP-
Diag [ } 44] (TwinCAT 2.9))
32 - 35
Max. cycle time (in 4/25 µs, see tab GeneralDiag [
}
44] (TwinCAT 2.8) or DP-Diag
[
}
44] (TwinCAT 2.9))
36 - 39
Max. cycle time (in 4/25 µs, see tab GeneralDiag [
}
44] (TwinCAT 2.8) or DP-Diag
[
}
44] (TwinCAT 2.9))
40 - 43
RealFailedCycle counter (see tab GeneralDiag [
}
44] (TwinCAT 2.8) or DP-Diag
[
}
44] (TwinCAT 2.9))
44 - 47
EquiCycleNoDxch counter (see tab EquiDiag [
}
46] (TwinCAT 2.8) or MC-Diag
[
}
46] (TwinCAT 2.9))
48 - 51
EquiCycleRepeat counter (see tab EquiDiag [
}
46] (TwinCAT 2.8) or MC-Diag
[
}
46] (TwinCAT 2.9))
52 - 55
Max. Repeats/Equi-Cycle (see tab EquiDiag [
}
46] (TwinCAT 2.8) or MC-Diag
[
}
46] (TwinCAT 2.9))
56 - 59
Actual Equi-Cycle-Time (in 4/25 µs, see tab EquiDiag [ } 46] (TwinCAT 2.8) or MC-
Diag [ } 46] (TwinCAT 2.9))
60 - 63
Max. Equi-Cycle-Time (in 4/25 µs, see tab EquiDiag [
}
46] (TwinCAT 2.8) or MC-
Diag [
}
46] (TwinCAT 2.9))
64 - 67
Min. Equi-Cycle-Time (in 4/25 µs, see tab EquiDiag [ } 46] (TwinCAT 2.8) or MC-
Diag [ } 46] (TwinCAT 2.9))
3.4.4 Slave diagnostics
DP-State
Each DP slave has a status variable that indicates the current state of that DP slave. This status is
maintained in real time, so that it is always adapted to the current DP slave data, and can be linked to a PLC
variable (->
DpState [
}
25] of the slave):
Fig. 16: Slave diagnostics - DP state