Commissioning/Configuration
EP5xxx
85
Version: 2.3.0
Overflow/underflow (not for EP5101-2011)
• Overflow/underflow control is inactive in combination with an activated reset function (C/external).
• The underflow bit (0x6000:04) is set if an underflow ...00 ->...FF occurs. It is reset if 2/3 of the counter
range are underrun.
• The overflow bit (0x6000:05) is set if an overflow FF...-> 0... occurs. It is reset if 1/3 of the counter
range is exceeded.
Open circuit detection
• A separate open circuit detection can be activated for each of the channels A, B and C (index
0x8000:0B, 0x8000:0C, 0x8000:0D).
• Open circuit detection is activated for channels A and B by default.
• A differential voltage of < 3.5 V (typical, subject to modification) is interpreted as an open circuit.
• If an open circuit is detected, it is indicated as process data
Open circuit
= TRUE (bit in object
Open
circuit
0x6000:07 is set). An open circuit is also indicated separately in indices 0xA000:01 (track A),
0xA000:02 (track B) and 0xA000:03 (track C).
• TxPDO state also becomes TRUE if an open circuit is detected, since invalid data have to be assumed.
Micro-increments
• Works with and without distributed clocks, but in the EP51x1 this is only meaningful in conjunction with
one of the DC modes.
• By setting the counter value only the integer component can be modified.
• The frequency measurement principle in extended mode:
Summary of Contents for EP5 Series
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