BeagleBoard XM C2, Reference Manual

Page: 91 / 163

REF: BB_SRM_xM
BeagleBoard-xM System
Reference Manual
Revision C2
Page 91 of 163
MSEN differential outputs. A high level indicates a powered on
receiver is not detected. O 11
ISEL This pin disables the I2C mode on chip. Configuration is
specified by the configuration pins (BSEL, DSEL, EDGE,
VREF) and state pins (PD, DKEN).
I 13
BSEL Selects the 24bit and single-edge clock mode. I 13
DSEL Lo to select the single ended clock mode. I 14
EDGE A high level selects the primary latch to occur on the rising edge
of the input clock IDCK I 9
DKEN A HI level enables the de-skew controlled by DK[1:3] I 35
V
REF
Sets the level of the input signals from the PROCESSOR. I 3
PD A HI selects normal operation and a LO selects the powerdown
mode. I 10
TGADJ This pin controls the amplitude of the DVI output voltage
swing, determined by the value of the pullup resistor RTFADJ
connected to 3.3V.
I 19
7.17.5 TFP410 Control Pins
There are twelve control pins that set up the TFP410 to operate with the processor. Most
of these pins are set by HW and do not require any intervention by the processor to set
them.
7.17.5.1 ISEL
The
ISEL pin is pulled LO via R99 to place the TFP410 in the control pin mode with the
I2C feature disabled. This allows the other modes for the TFP410 to be set by the other
control pins.
7.17.5.2 BSEL
The
BSEL pin is pulled HI to select the 24 bit mode for the Pixel Data interface from the
processor.
7.17.5.3 DSEL
The
DSEL pin is pulled low to select the single ended clock mode from the
PROCESSOR .
7.17.5.4 EDGE
The
EDGE signal is pulled HI through R82 to select the rising edge on the IDCK+ lead
which is the pixel clock from the PROCESSOR .
7.17.5.5 DKEN
The
DKEN signal is pulled HI to enable the de-skew pins. The de-skew pins, DK1-DK3,
are pulled low by the internal pulldown resistors in the TFP410 . This is the default mode