BeagleBoard XM C2, Reference Manual

Page: 113 / 163

REF: BB_SRM_xM
BeagleBoard-xM System
Reference Manual
Revision C2
Page 113 of 163
7.26.4 HSUSB1 Signals
These signals are the other High Speed USB port found on the processor. It is the same
interface that is used to communicate to the UBS PHY on the board, but a different port.
Table 30 gives the signals that are used for this interface. In order for these pins to be
used, the pin mux must be set to Mode 3 .
Table 30. P17 High Speed USB Expansion Signals
7.26.5 Alternate Clock
The
SYS_ALTCLK signal can be used to provide an alternate system clock into the
processor. This can be used for things such as the GPTIMERS, USB, or as a clock for the
NTSC/PAL S-Video output.
7.26.6 HDQ 1-Wire
The HDQ/1-Wire module implements the hardware protocol of the master functions of
the Benchmarq HDQ and the Dallas Semiconductor 1-Wire® protocols. These protocols
use a single wire for communication between the master (HDQ/1-Wire controller) and
the slaves (HDQ/1-Wire external compliant devices).
7.26.7 ADC
There is one A to D converter pin provided on the Auxiliary Expansion Header. This pin
is labeled
AUX_ADC and connects to the ADCIN6 pin of the TPS65950 and can be
controlled and read by the processor using the I2C1 interface. There are voltage level
restrictions to this pin, so refer to the
TPS65950 documentation before using this pin.
PIN SIGNAL I/0 PROC DESCRIPTION
3 HSUSB1_D6 I/O AF13 Bidirectional Data
4 HSUSB1_D3 I/O AH14 Bidirectional Data
5 HSUSB_D7 I/O AE13 Bidirectional Data
6 HSUSB1_D2 I/O AH12 Bidirectional Data
7 HSUSB1_D1 I/O AG12 Bidirectional Data
8 HSUSB1_D5 I/O AH9 Bidirectional Data
9 HSUSB1_NXT I AG9 Next signal
10 HSUSB1_D0 I/O AF11 Bidirectional Data
11 HSUSB1_D4 I/O AE11 Bidirectional Data
12 HSUSB1_CLK O AE10 60MHZ Clock output
13 HSUSB1_DIR I AF9 Data direction signal
14 HSUSB1_STP O AF10- Stop signal