Avtech AVRQ-5-B, Instructions Manual

Page: 36 / 91

ALWAYS ENSURE THAT THE SILKSCREENED ARROW ON THE
DAUGHTERBOARD IS POINTING IN THE SAME DIRECTION AS THE ARROW ON
THE MAINFRAME, AS SHOWN IN THE PHOTOS ABOVE. The instrument will not be
damaged by inserting the daughterboard in the wrong position, as long as the arrows are
aligned. If the daughterboard is oriented 180° relative to its correct orientation (i.e., the
arrows point in opposite directions), the instrument may be damaged during operation.
The daughterboard is designed to hit the ZIF lever if it is inserted in the wrong orientation,
to alert the user to the error.
Two physical positions are used to achieve polarity switching, rather than using internal
high-voltage relays, in order to achieve the fastest possible switching times. The parasitic
inductance and capacitance added by physically-large high-voltage relays would degrade
performance noticeably. The front-panel AMP1 setting determines which of the two
internal pulse generator circuits (+ and -) is active. Only one is active at a time, to avoid
interference.
DAUGHTERBOARD COMPONENTS
The circuit diagram for the included sample daughterboards shown on page 33
includes more that just the socket for the 8-pin DUT.
A battery holder (BT1) is provided to hold one A23-type 12V battery. When installed by
the user, this battery will apply +12V to the regulator IC (U2), which provides a floating
+5.0V power source (VCC1) to the DUT. An A23 battery is supplied with each sample
daughterboard, and additional ones can be easily purchased from Digi-Key (see stock
number N403-ND,
www.digikey.com/product-detail/en/A23C/N403-ND ). The battery is
not required if the DUT does not require a voltage or current bias (for example, when
testing current-drive opto-couplers in the LED “off” state).
A number of bypass capacitors are installed by default.
Two resistor footprints are associated with each of pins 1 – 4 of the DUT, allowing
these pins to be individually tied to VCC1, GND1, or be left open.
Resistor footprints R4 and R6 allow either pin 6 or 7 (or both) of the DUT to be used as
the logic output. R2 can be used to pull-up the DUT output (if it is an open-collector
output, in particular) and C6 can be used to add a load capacitance to the logic output.
These component values are sometimes specified by particular test standards.
The user will need to configure R1-R11 and C6 as appropriate for the DUT.
Lastly, two solder pads (P1 and P2 in the schematic, both are labeled “CAP” on the
actual PCB) are provided. A high-voltage ceramic capacitor (rated for at least 1.5 kV)
may be soldered between these two pads in order to increase the rise time of the pulse.
With no capacitance installed, switching times of < 10 ns (10%-90%) are normally
obtainable. Adding capacitance will typically degrade the rise time by 1 ns per 6 pF, up
36