Some decaying LC-type oscillations are observed, due to the parasitic inductance in the
circuit interacting with the parasitic capacitance.
Similar results are obtained for the VO3120 when its input side is biased high rather
than low:
Top: +1.5 kV HV pulse
Bottom: Logic out into open circuit
VO3120, R2 = ∞, R3 = 348Ω,
R4/6/10 = 0, 100 ns/div
Top: -1.5 kV HV pulse
Bottom: Logic out into open circuit
VO3120, R2 = ∞, R3 = 348Ω,
R4/6/10 = 0, 100 ns/div
(Note that a low-voltage differential logic probe can not be used for the above test,
unless it is rated to handle a +15V signal.)
Some level of capacitive interference is unavoidable. Its magnitude depends on the
design of the DUT output circuitry (especially its output impedance in both logic states).
65
Summary of Contents for AVRQ-5-B
Page 52: ...Bottom side 52 ...
Page 57: ...PCB 299B FOR ADUM241E0BRWZ 57 ...
Page 82: ...PCB 158R2 LOW VOLTAGE POWER SUPPLY ...
Page 87: ...DUT WIRING ON STANDARD DAUGHTERBOARD PCB 267C ...
Page 88: ...DUT WIRING ON CUSTOMIZED TLP2366 DAUGHTERBOARD PCB 298B ...
Page 89: ...DUT WIRING ON CUSTOMIZED ADUM241E0BRWZ DAUGHTERBOARD PCB 299B ...
Page 91: ...PERFORMANCE CHECK SHEET 91 ...